diff for duplicates of <13641152.Yt4ZI3oT6L@wuerfel> diff --git a/a/1.txt b/N1/1.txt index 36ea7d7..3a6d074 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -14,23 +14,3 @@ On Wednesday 13 May 2015 18:54:10 Maxime Coquelin wrote: I would only list the index definitions in the binding if they are common across all chips using that binding. - -From what I see above, this is really regular, so it's possible -that others follow it as well, but it's also possible that another -chip completely screwed up that system because it didn't fit -otherwise. - -Ideally the binding should follow closely what is documented -in the data sheet. - -> > Are there parts that need something else? If the 0x10 offset is -> > different, we probably want a different compatible string, and I'd -> > consider it a different part at that point. If there are chips -> > that do not spread the clock from the reset by exactly 256 bits, -> > we could add a DT property in the rcc node for that. -> -> I will check other chips, to see if this is valid generally. - -Ok. - - Arnd diff --git a/a/content_digest b/N1/content_digest index fd0af32..c71032a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,32 +1,56 @@ "ref\01431158038-3813-1-git-send-email-mcoquelin.stm32@gmail.com\0" "ref\02282066.NWoIT9ZyLc@wuerfel\0" "ref\0CALszF6CaO_yuNiSDuDV+4d2NRe_+32j=zcSE1HPhB1UH59cW9w@mail.gmail.com\0" - "ref\0CALszF6CaO_yuNiSDuDV+4d2NRe_+32j=zcSE1HPhB1UH59cW9w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>\0" + "From\0Arnd Bergmann <arnd@arndb.de>\0" "Subject\0Re: [PATCH v8 14/16] ARM: dts: Introduce STM32F429 MCU\0" "Date\0Wed, 13 May 2015 21:11:33 +0200\0" - "To\0Maxime Coquelin <mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0Daniel Thompson <daniel.thompson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" - " Uwe Kleine-K\303\266nig <u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>" - " Andreas F\303\244rber <afaerber-l3A5Bk7waGM@public.gmane.org>" - Geert Uytterhoeven <geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org> - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> - Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org> - Peter Meerwald <pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org> - Paul Bolle <pebolle-IWqWACnzNjzz+pZb47iToQ@public.gmane.org> - Peter Hurley <peter-WaGBZJeGNqdsbIuE7sb01tBPR1lH4CV8@public.gmane.org> - Andy Shevchenko <andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Joe Perches <joe-6d6DIl74uiNBDgjK7y7TUQ@public.gmane.org> - Vladimir Zapolskiy <vladimir_zapolskiy-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org> - Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> - Jonathan Corbet <corbet-T1hC0tSOHrs@public.gmane.org> - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - " Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0" + "To\0Maxime Coquelin <mcoquelin.stm32@gmail.com>\0" + "Cc\0Daniel Thompson <daniel.thompson@linaro.org>" + " Uwe Kleine-K\303\266nig <u.kleine-koenig@pengutronix.de>" + " Andreas F\303\244rber <afaerber@suse.de>" + Geert Uytterhoeven <geert@linux-m68k.org> + Rob Herring <robh+dt@kernel.org> + Philipp Zabel <p.zabel@pengutronix.de> + Linus Walleij <linus.walleij@linaro.org> + Stefan Agner <stefan@agner.ch> + Peter Meerwald <pmeerw@pmeerw.net> + Paul Bolle <pebolle@tiscali.nl> + Peter Hurley <peter@hurleysoftware.com> + Andy Shevchenko <andy.shevchenko@gmail.com> + Chanwoo Choi <cw00.choi@samsung.com> + Russell King <linux@arm.linux.org.uk> + Daniel Lezcano <daniel.lezcano@linaro.org> + Joe Perches <joe@perches.com> + Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> + Lee Jones <lee.jones@linaro.org> + Jonathan Corbet <corbet@lwn.net> + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Thomas Gleixner <tglx@linutronix.de> + Greg Kroah-Hartman <gregkh@linuxfoundation.org> + Jiri Slaby <jslaby@suse.cz> + Andrew Morton <akpm@linux-foundation.org> + David S. Miller <davem@davemloft.net> + Mauro Carvalho Chehab <mchehab@osg.samsung.com> + Antti Palosaari <crope@iki.fi> + Tejun Heo <tj@kernel.org> + Will Deacon <will.deacon@arm.com> + Nikolay Borisov <Nikolay.Borisov@arm.com> + Rusty Russell <rusty@rustcorp.com.au> + Kees Cook <keescook@chromium.org> + Michal Marek <mmarek@suse.cz> + linux-doc@vger.kernel.org <linux-doc@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + linux-gpio@vger.kernel.org <linux-gpio@vger.kernel.org> + linux-serial@vger.kernel.org <linux-serial@vger.kernel.org> + Linux-Arch <linux-arch@vger.kernel.org> + linux-api@vger.kernel.org <linux-api@vger.kernel.org> + Nicolae Rosia <nicolae.rosia@gmail.com> + " Kamil Lulko <rev13@wp.pl>\0" "\00:1\0" "b\0" "On Wednesday 13 May 2015 18:54:10 Maxime Coquelin wrote:\n" @@ -44,26 +68,6 @@ "> listing indexes in the documentation?\n" "\n" "I would only list the index definitions in the binding if they\n" - "are common across all chips using that binding.\n" - "\n" - "From what I see above, this is really regular, so it's possible\n" - "that others follow it as well, but it's also possible that another\n" - "chip completely screwed up that system because it didn't fit\n" - "otherwise.\n" - "\n" - "Ideally the binding should follow closely what is documented\n" - "in the data sheet.\n" - "\n" - "> > Are there parts that need something else? If the 0x10 offset is\n" - "> > different, we probably want a different compatible string, and I'd\n" - "> > consider it a different part at that point. If there are chips\n" - "> > that do not spread the clock from the reset by exactly 256 bits,\n" - "> > we could add a DT property in the rcc node for that.\n" - "> \n" - "> I will check other chips, to see if this is valid generally.\n" - "\n" - "Ok.\n" - "\n" - "\tArnd" + are common across all chips using that binding. -19a1238d85263c6be5ac762a78f947db1edbf4147b727730b472768f5861d7d7 +bab7ec321bfd948e664619ce87c3388ee6e3394d748509850e3f4ee391a56ec4
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