From: Will Deacon <will.deacon@arm.com>
To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: arnd@arndb.de, monstr@monstr.eu, dhowells@redhat.com,
broonie@linaro.org, benh@kernel.crashing.org,
peterz@infradead.org, paulmck@linux.vnet.ibm.com,
Will Deacon <will.deacon@arm.com>
Subject: [PATCH 00/18] Cross-architecture definitions of relaxed MMIO accessors
Date: Thu, 17 Apr 2014 14:44:03 +0100 [thread overview]
Message-ID: <1397742261-15621-1-git-send-email-will.deacon@arm.com> (raw)
Hello,
This RFC series attempts to define a portable (i.e. cross-architecture)
definition of the {readX,writeX}_relaxed MMIO accessor functions. These
functions are already in widespread use amongst drivers (mainly those supporting
devices embedded in ARM SoCs), but lack any well-defined semantics and,
subsequently, any portable definitions to allow these drivers to be compiled for
other architectures.
The two main motivations for this series are:
(1) To promote use of the _relaxed MMIO accessors on weakly-ordered
architectures, where they can bring significant performance improvements
over their non-relaxed counterparts.
(2) To allow COMPILE_TEST to build drivers using the relaxed accessors across
all architectures.
The proposed semantics largely match exactly those provided by the ARM
implementation (i.e. no weaker), with one exception (see below).
Informally:
- Relaxed accesses to the same device are ordered with respect to each other.
- Relaxed accesses are *not* guaranteed to be ordered with respect to normal
memory accesses (e.g. DMA buffers -- this is what gives us the performance
boost over the non-relaxed versions).
- Relaxed accesses are not guaranteed to be ordered with respect to
LOCK/UNLOCK operations.
In actual fact, the relaxed accessors *are* ordered with respect to LOCK/UNLOCK
operations on ARM[64], but I have added this constraint for the benefit of
PowerPC, which has expensive I/O barriers in the spin_unlock path for the
non-relaxed accessors.
A corollary to this is that mmiowb() probably needs rethinking. As it currently
stands, an mmiowb() is required to order MMIO writes to a device from multiple
CPUs, even if that device is protected by a lock. However, this isn't often used
in practice, leading to PowerPC implementing both mmiowb() *and* synchronising
I/O in spin_unlock.
I would propose making the non-relaxed I/O accessors ordered with respect to
LOCK/UNLOCK, leaving mmiowb() to be used with the relaxed accessors, if
required, but would welcome thoughts/suggestions on this topic.
All feedback welcome,
Will
Will Deacon (18):
asm-generic: io: implement relaxed accessor macros as conditional
wrappers
microblaze: io: remove dummy relaxed accessor macros
s390: io: remove dummy relaxed accessor macros for reads
xtensa: io: remove dummy relaxed accessor macros for reads
alpha: io: implement relaxed accessor macros for writes
frv: io: implement dummy relaxed accessor macros for writes
cris: io: implement dummy relaxed accessor macros for writes
ia64: io: implement dummy relaxed accessor macros for writes
m32r: io: implement dummy relaxed accessor macros for writes
m68k: io: implement dummy relaxed accessor macros for writes
mn10300: io: implement dummy relaxed accessor macros for writes
parisc: io: implement dummy relaxed accessor macros for writes
powerpc: io: implement dummy relaxed accessor macros for writes
sparc: io: implement dummy relaxed accessor macros for writes
tile: io: implement dummy relaxed accessor macros for writes
x86: io: implement dummy relaxed accessor macros for writes
documentation: memory-barriers: clarify relaxed io accessor semantics
asm-generic: io: define relaxed accessor macros unconditionally
Documentation/memory-barriers.txt | 13 +++++++++----
arch/alpha/include/asm/io.h | 12 ++++++++----
arch/cris/include/asm/io.h | 3 +++
arch/frv/include/asm/io.h | 3 +++
arch/ia64/include/asm/io.h | 4 ++++
arch/m32r/include/asm/io.h | 3 +++
arch/m68k/include/asm/io.h | 8 ++++++++
arch/m68k/include/asm/io_no.h | 4 ----
arch/microblaze/include/asm/io.h | 8 --------
arch/mn10300/include/asm/io.h | 4 ++++
arch/parisc/include/asm/io.h | 12 ++++++++----
arch/powerpc/include/asm/io.h | 12 ++++++++----
arch/s390/include/asm/io.h | 5 -----
arch/sparc/include/asm/io.h | 9 +++++++++
arch/sparc/include/asm/io_32.h | 3 ---
arch/sparc/include/asm/io_64.h | 22 ++++++++++------------
arch/tile/include/asm/io.h | 4 ++++
arch/x86/include/asm/io.h | 4 ++++
arch/xtensa/include/asm/io.h | 7 -------
include/asm-generic/io.h | 23 ++++++++++++++++-------
20 files changed, 101 insertions(+), 62 deletions(-)
--
1.9.1
next reply other threads:[~2014-04-17 13:44 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-17 13:44 Will Deacon [this message]
2014-04-17 13:44 ` [PATCH 00/18] Cross-architecture definitions of relaxed MMIO accessors Will Deacon
2014-04-17 13:44 ` [PATCH 01/18] asm-generic: io: implement relaxed accessor macros as conditional wrappers Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 02/18] microblaze: io: remove dummy relaxed accessor macros Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-22 13:53 ` Michal Simek
2014-04-22 13:53 ` Michal Simek
2014-04-17 13:44 ` [PATCH 03/18] s390: io: remove dummy relaxed accessor macros for reads Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 04/18] xtensa: " Will Deacon
2014-04-17 13:44 ` [PATCH 05/18] alpha: io: implement relaxed accessor macros for writes Will Deacon
2014-04-17 13:44 ` [PATCH 06/18] frv: io: implement dummy " Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 07/18] cris: " Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-22 13:47 ` Jesper Nilsson
2014-04-22 13:47 ` Jesper Nilsson
2014-04-17 13:44 ` [PATCH 08/18] ia64: " Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 09/18] m32r: " Will Deacon
2014-04-17 13:44 ` [PATCH 10/18] m68k: " Will Deacon
2014-04-17 16:07 ` Geert Uytterhoeven
2014-04-17 13:44 ` [PATCH 11/18] mn10300: " Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 12/18] parisc: " Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 13/18] powerpc: " Will Deacon
2014-04-17 13:44 ` [PATCH 14/18] sparc: " Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 15/18] tile: " Will Deacon
2014-04-17 14:52 ` Chris Metcalf
2014-04-17 13:44 ` [PATCH 16/18] x86: " Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-22 16:08 ` Will Deacon
2014-05-21 1:53 ` Brian Norris
2014-05-21 9:22 ` Will Deacon
2014-04-17 13:44 ` [PATCH 17/18] documentation: memory-barriers: clarify relaxed io accessor semantics Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-17 13:44 ` [PATCH 18/18] asm-generic: io: define relaxed accessor macros unconditionally Will Deacon
2014-04-17 13:44 ` Will Deacon
2014-04-22 14:09 ` Michal Simek
2014-04-22 15:18 ` Will Deacon
2014-04-22 15:18 ` Will Deacon
2014-04-23 7:12 ` Michal Simek
2014-04-23 7:12 ` Michal Simek
2014-04-23 7:23 ` Sam Ravnborg
2014-04-23 7:23 ` Sam Ravnborg
2014-04-23 7:36 ` Michal Simek
2014-04-17 14:00 ` [PATCH 00/18] Cross-architecture definitions of relaxed MMIO accessors Peter Zijlstra
2014-04-17 14:15 ` Will Deacon
2014-04-17 14:15 ` Will Deacon
2014-04-17 21:36 ` Benjamin Herrenschmidt
2014-05-01 11:10 ` Will Deacon
2014-04-17 15:36 ` Sam Ravnborg
2014-04-17 15:47 ` Will Deacon
2014-04-17 19:15 ` Sam Ravnborg
2014-04-22 13:43 ` Will Deacon
2014-04-22 14:30 ` Sam Ravnborg
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