linux-arch.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Yijing Wang <wangyijing@huawei.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Xinwei Hu <huxinwei@huawei.com>, Wuyun <wuyun.wu@huawei.com>,
	linux-arm-kernel@lists.infradead.org,
	Russell King <linux@arm.linux.org.uk>,
	linux-arch@vger.kernel.org, arnab.basu@freescale.com,
	Bharat.Bhushan@freescale.com, x86@kernel.org,
	Arnd Bergmann <arnd@arndb.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	xen-devel@lists.xenproject.org, Joerg Roedel <joro@8bytes.org>,
	iommu@lists.linux-foundation.org, linux-mips@linux-mips.org,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
	Sebastian Ott <sebott@linux.vnet.ibm.com>,
	Tony Luck <tony.luck@intel.com>,
	linux-ia64@vger.kernel.org,
	"David S. Miller" <davem@davemloft.net>,
	sparclinux@vger.kernel.org, Chris Metcalf <cmetcalf@til>
Subject: [PATCH v3 26/27] tile/MSI: Use MSI chip framework to configure MSI/MSI-X irq
Date: Wed, 15 Oct 2014 11:07:14 +0800	[thread overview]
Message-ID: <1413342435-7876-27-git-send-email-wangyijing@huawei.com> (raw)
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>

Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 arch/tile/include/asm/pci.h |   10 ++++++++++
 arch/tile/kernel/pci_gx.c   |   13 +++++++++++--
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index dfedd7a..d27d9ec 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -152,6 +152,7 @@ struct pci_controller {
 	int pio_io_index;	/* PIO region index for I/O space access */
 #endif
 
+	struct msi_chip *msi_chip;
 	/*
 	 * Mem-Map regions for all the memory controllers so that Linux can
 	 * map all of its physical memory space to the PCI bus.
@@ -179,6 +180,15 @@ struct pci_controller {
 	int irq_intx_table[4];
 };
 
+extern struct msi_chip tilegx_msi;
+
+static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus)
+{
+	struct pci_controller *controller = bus->sysdata;
+
+	return controller->msi_chip;
+}
+
 extern struct pci_controller pci_controllers[TILEGX_NUM_TRIO * TILEGX_TRIO_PCIES];
 extern gxio_trio_context_t trio_contexts[TILEGX_NUM_TRIO];
 extern int num_trio_shims;
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index e39f9c5..ba66517 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -887,6 +887,7 @@ int __init pcibios_init(void)
 					controller->mem_offset);
 		pci_add_resource(&resources, &controller->io_space);
 		controller->first_busno = next_busno;
+		controller->msi_chip = &tilegx_msi;
 		bus = pci_scan_root_bus(NULL, next_busno, controller->ops,
 					controller, &resources);
 		controller->root_bus = bus;
@@ -1485,7 +1486,8 @@ static struct irq_chip tilegx_msi_chip = {
 	/* TBD: support set_affinity. */
 };
 
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int tile_setup_msi_irq(struct msi_chip *chip,
+		struct pci_dev *pdev, struct msi_desc *desc)
 {
 	struct pci_controller *controller;
 	gxio_trio_context_t *trio_context;
@@ -1604,7 +1606,12 @@ is_64_failure:
 	return ret;
 }
 
-void arch_teardown_msi_irq(unsigned int irq)
+static void tile_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
 {
 	irq_free_hwirq(irq);
 }
+
+struct msi_chip tilegx_msi = {
+	.setup_irq = tile_setup_msi_irq,
+	.teardown_irq = tile_teardown_msi_irq,
+};
-- 
1.7.1


WARNING: multiple messages have this Message-ID (diff)
From: Yijing Wang <wangyijing@huawei.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Xinwei Hu <huxinwei@huawei.com>, Wuyun <wuyun.wu@huawei.com>,
	linux-arm-kernel@lists.infradead.org,
	Russell King <linux@arm.linux.org.uk>,
	linux-arch@vger.kernel.org, arnab.basu@freescale.com,
	Bharat.Bhushan@freescale.com, x86@kernel.org,
	Arnd Bergmann <arnd@arndb.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	xen-devel@lists.xenproject.org, Joerg Roedel <joro@8bytes.org>,
	iommu@lists.linux-foundation.org, linux-mips@linux-mips.org,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
	Sebastian Ott <sebott@linux.vnet.ibm.com>,
	Tony Luck <tony.luck@intel.com>,
	linux-ia64@vger.kernel.org,
	"David S. Miller" <davem@davemloft.net>,
	sparclinux@vger.kernel.org, Chris Metcalf <cmetcalf@tilera.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	David Vrabel <david.vrabel@citrix.com>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Thierry Reding <thierry.reding@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Liviu Dudau <liviu@dudau.co.uk>,
	Yijing Wang <wangyijing@huawei.com>
Subject: [PATCH v3 26/27] tile/MSI: Use MSI chip framework to configure MSI/MSI-X irq
Date: Wed, 15 Oct 2014 11:07:14 +0800	[thread overview]
Message-ID: <1413342435-7876-27-git-send-email-wangyijing@huawei.com> (raw)
Message-ID: <20141015030714.NLZNAKgnxXkWfZFTXwC8Vzz_9_PMRnQIDE6oey5-zf8@z> (raw)
In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com>

Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
---
 arch/tile/include/asm/pci.h |   10 ++++++++++
 arch/tile/kernel/pci_gx.c   |   13 +++++++++++--
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index dfedd7a..d27d9ec 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -152,6 +152,7 @@ struct pci_controller {
 	int pio_io_index;	/* PIO region index for I/O space access */
 #endif
 
+	struct msi_chip *msi_chip;
 	/*
 	 * Mem-Map regions for all the memory controllers so that Linux can
 	 * map all of its physical memory space to the PCI bus.
@@ -179,6 +180,15 @@ struct pci_controller {
 	int irq_intx_table[4];
 };
 
+extern struct msi_chip tilegx_msi;
+
+static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus)
+{
+	struct pci_controller *controller = bus->sysdata;
+
+	return controller->msi_chip;
+}
+
 extern struct pci_controller pci_controllers[TILEGX_NUM_TRIO * TILEGX_TRIO_PCIES];
 extern gxio_trio_context_t trio_contexts[TILEGX_NUM_TRIO];
 extern int num_trio_shims;
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index e39f9c5..ba66517 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -887,6 +887,7 @@ int __init pcibios_init(void)
 					controller->mem_offset);
 		pci_add_resource(&resources, &controller->io_space);
 		controller->first_busno = next_busno;
+		controller->msi_chip = &tilegx_msi;
 		bus = pci_scan_root_bus(NULL, next_busno, controller->ops,
 					controller, &resources);
 		controller->root_bus = bus;
@@ -1485,7 +1486,8 @@ static struct irq_chip tilegx_msi_chip = {
 	/* TBD: support set_affinity. */
 };
 
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+static int tile_setup_msi_irq(struct msi_chip *chip,
+		struct pci_dev *pdev, struct msi_desc *desc)
 {
 	struct pci_controller *controller;
 	gxio_trio_context_t *trio_context;
@@ -1604,7 +1606,12 @@ is_64_failure:
 	return ret;
 }
 
-void arch_teardown_msi_irq(unsigned int irq)
+static void tile_teardown_msi_irq(struct msi_chip *chip, unsigned int irq)
 {
 	irq_free_hwirq(irq);
 }
+
+struct msi_chip tilegx_msi = {
+	.setup_irq = tile_setup_msi_irq,
+	.teardown_irq = tile_teardown_msi_irq,
+};
-- 
1.7.1


  parent reply	other threads:[~2014-10-15  3:07 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-15  3:06 [PATCH v3 00/27] Use MSI chip framework to configure MSI/MSI-X in all platforms Yijing Wang
2014-10-15  3:06 ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 01/27] MSI: Remove the redundant irq_set_chip_data() Yijing Wang
2014-10-15  3:06   ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 03/27] s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq() Yijing Wang
2014-10-15  3:06   ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 04/27] arm/MSI: Save MSI chip in pci_sys_data Yijing Wang
2014-10-15  3:06   ` Yijing Wang
2014-10-20 17:21   ` Lorenzo Pieralisi
2014-10-20 17:21     ` Lorenzo Pieralisi
2014-10-21  1:32     ` Yijing Wang
2014-10-21  1:32       ` Yijing Wang
     [not found]   ` <1413342435-7876-5-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-23  5:35     ` Bjorn Helgaas
2014-10-23  5:35       ` Bjorn Helgaas
2014-10-23  6:32       ` Yijing Wang
2014-10-23  6:32         ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 05/27] PCI: tegra: Save msi " Yijing Wang
2014-10-15  3:06   ` Yijing Wang
     [not found]   ` <1413342435-7876-6-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-23  5:18     ` Bjorn Helgaas
2014-10-23  5:18       ` Bjorn Helgaas
2014-10-23  6:23       ` Yijing Wang
2014-10-23  6:23         ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 06/27] PCI: designware: " Yijing Wang
2014-10-15  3:06   ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 07/27] PCI: rcar: " Yijing Wang
2014-10-15  3:06   ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 08/27] PCI: mvebu: " Yijing Wang
2014-10-15  3:06   ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 09/27] arm/PCI: Clean unused pcibios_add_bus() and pcibios_remove_bus() Yijing Wang
2014-10-15  3:06   ` Yijing Wang
     [not found]   ` <1413342435-7876-10-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-23  5:38     ` Bjorn Helgaas
2014-10-23  5:38       ` Bjorn Helgaas
2014-10-23  6:39       ` Yijing Wang
2014-10-23  6:39         ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 10/27] PCI/MSI: Remove useless bus->msi assignment Yijing Wang
2014-10-15  3:06   ` Yijing Wang
     [not found]   ` <1413342435-7876-11-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-23  5:41     ` Bjorn Helgaas
2014-10-23  5:41       ` Bjorn Helgaas
2014-10-23  6:40       ` Yijing Wang
2014-10-23  6:40         ` Yijing Wang
2014-10-15  3:06 ` [PATCH v3 11/27] PCI/MSI: Refactor struct msi_chip to make it become more common Yijing Wang
2014-10-15  3:06   ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 12/27] x86/MSI: Use MSI chip framework to configure MSI/MSI-X irq Yijing Wang
2014-10-15  3:07   ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 13/27] x86/xen/MSI: " Yijing Wang
2014-10-15  3:07   ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 14/27] Irq_remapping/MSI: " Yijing Wang
2014-10-15  3:07   ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 16/27] Mips/MSI: Save msi chip in pci sysdata Yijing Wang
2014-10-15  3:07   ` Yijing Wang
2014-10-25 13:04   ` Ralf Baechle
2014-10-25 13:04     ` Ralf Baechle
2014-10-27  1:06     ` Yijing Wang
2014-10-27  1:06       ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 19/27] MIPS/Xlp/MSI: Use MSI chip framework to configure MSI/MSI-X irq Yijing Wang
2014-10-15  3:07   ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 20/27] MIPS/Xlr/MSI: " Yijing Wang
2014-10-15  3:07   ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 22/27] s390/MSI: " Yijing Wang
2014-10-15  3:07   ` Yijing Wang
     [not found]   ` <1413342435-7876-23-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-16 12:13     ` Sebastian Ott
2014-10-16 12:13       ` Sebastian Ott
2014-10-17  1:04       ` Yijing Wang
2014-10-17  1:04         ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 23/27] arm/iop13xx/MSI: " Yijing Wang
2014-10-15  3:07   ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 24/27] IA64/MSI: " Yijing Wang
2014-10-15  3:07   ` Yijing Wang
     [not found]   ` <1413342435-7876-25-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-22 23:53     ` Bjorn Helgaas
2014-10-22 23:53       ` Bjorn Helgaas
2014-10-23  1:17       ` Yijing Wang
2014-10-23  1:17         ` Yijing Wang
2014-10-15  3:07 ` [PATCH v3 25/27] Sparc/MSI: " Yijing Wang
     [not found]   ` <1413342435-7876-26-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-15  2:36     ` David Miller
2014-10-15  2:36       ` David Miller
2014-10-15  3:07   ` Yijing Wang
2014-10-15  3:07 ` Yijing Wang [this message]
2014-10-15  3:07   ` [PATCH v3 26/27] tile/MSI: " Yijing Wang
2014-10-15  3:07 ` [PATCH v3 27/27] PCI/MSI: Clean up unused MSI arch functions Yijing Wang
2014-10-15  3:07   ` Yijing Wang
     [not found] ` <1413342435-7876-1-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-15  3:06   ` [PATCH v3 02/27] x86/xen/MSI: Eliminate arch_msix_mask_irq() and arch_msi_mask_irq() Yijing Wang
2014-10-15  3:06     ` Yijing Wang
2014-10-23  4:25     ` Bjorn Helgaas
2014-10-23  4:25       ` Bjorn Helgaas
2014-10-23  4:44       ` Yijing Wang
2014-10-23  4:44         ` Yijing Wang
2014-10-15  3:07   ` [PATCH v3 15/27] x86/MSI: Remove unused MSI weak arch functions Yijing Wang
2014-10-15  3:07     ` Yijing Wang
2014-10-15  3:07   ` [PATCH v3 17/27] MIPS/Octeon/MSI: Use MSI chip framework to configure MSI/MSI-X irq Yijing Wang
2014-10-15  3:07     ` Yijing Wang
2014-10-15  3:07   ` [PATCH v3 18/27] MIPS/Xlp: Remove the dead function destroy_irq() to fix build error Yijing Wang
2014-10-15  3:07     ` Yijing Wang
2014-10-25 13:11     ` Ralf Baechle
2014-10-25 13:11       ` Ralf Baechle
2014-10-15  3:07   ` [PATCH v3 21/27] Powerpc/MSI: Use MSI chip framework to configure MSI/MSI-X irq Yijing Wang
2014-10-15  3:07     ` Yijing Wang
     [not found]     ` <1413342435-7876-22-git-send-email-wangyijing-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2014-10-17  7:23       ` Michael Ellerman
2014-10-17  7:23         ` Michael Ellerman
2014-10-17  7:42         ` Yijing Wang
2014-10-17  7:42           ` Yijing Wang
2014-10-23  5:43   ` [PATCH v3 00/27] Use MSI chip framework to configure MSI/MSI-X in all platforms Bjorn Helgaas
2014-10-23  5:43     ` Bjorn Helgaas
2014-10-23  7:45     ` Yijing Wang
2014-10-23  7:45       ` Yijing Wang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1413342435-7876-27-git-send-email-wangyijing@huawei.com \
    --to=wangyijing@huawei.com \
    --cc=Bharat.Bhushan@freescale.com \
    --cc=arnab.basu@freescale.com \
    --cc=arnd@arndb.de \
    --cc=benh@kernel.crashing.org \
    --cc=bhelgaas@google.com \
    --cc=cmetcalf@til \
    --cc=davem@davemloft.net \
    --cc=huxinwei@huawei.com \
    --cc=iommu@lists.linux-foundation.org \
    --cc=joro@8bytes.org \
    --cc=konrad.wilk@oracle.com \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-ia64@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-s390@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=sebott@linux.vnet.ibm.com \
    --cc=sparclinux@vger.kernel.org \
    --cc=tglx@linutronix.de \
    --cc=tony.luck@intel.com \
    --cc=wuyun.wu@huawei.com \
    --cc=x86@kernel.org \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).