From mboxrd@z Thu Jan 1 00:00:00 1970 From: Philipp Zabel Subject: Re: [PATCH 12/14] ARM: dts: Introduce STM32F429 MCU Date: Fri, 13 Feb 2015 12:47:58 +0100 Message-ID: <1423828078.4182.17.camel@pengutronix.de> References: <1423763164-5606-1-git-send-email-mcoquelin.stm32@gmail.com> <1423763164-5606-13-git-send-email-mcoquelin.stm32@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1423763164-5606-13-git-send-email-mcoquelin.stm32@gmail.com> Sender: linux-doc-owner@vger.kernel.org To: Maxime Coquelin Cc: Jonathan Corbet , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Daniel Lezcano , Thomas Gleixner , Linus Walleij , Greg Kroah-Hartman , Jiri Slaby , Arnd Bergmann , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Joe Perches , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal List-Id: linux-arch.vger.kernel.org Hi Maxime, Am Donnerstag, den 12.02.2015, 18:46 +0100 schrieb Maxime Coquelin: [...] > + soc { > + reset_ahb1: reset@40023810 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023810 0x4>; > + }; > + > + reset_ahb2: reset@40023814 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023814 0x4>; > + }; > + > + reset_ahb3: reset@40023818 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023818 0x4>; > + }; > + > + reset_apb1: reset@40023820 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023820 0x4>; > + }; > + > + reset_apb2: reset@40023824 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023824 0x4>; > + }; These are mostly consecutive, single registers. I wonder if these are part of the same IP block and thus should be grouped together into the same reset controller node? regards Philipp From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from metis.ext.pengutronix.de ([92.198.50.35]:48081 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752767AbbBMLs7 (ORCPT ); Fri, 13 Feb 2015 06:48:59 -0500 Message-ID: <1423828078.4182.17.camel@pengutronix.de> Subject: Re: [PATCH 12/14] ARM: dts: Introduce STM32F429 MCU From: Philipp Zabel Date: Fri, 13 Feb 2015 12:47:58 +0100 In-Reply-To: <1423763164-5606-13-git-send-email-mcoquelin.stm32@gmail.com> References: <1423763164-5606-1-git-send-email-mcoquelin.stm32@gmail.com> <1423763164-5606-13-git-send-email-mcoquelin.stm32@gmail.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-arch-owner@vger.kernel.org List-ID: To: Maxime Coquelin Cc: Jonathan Corbet , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Daniel Lezcano , Thomas Gleixner , Linus Walleij , Greg Kroah-Hartman , Jiri Slaby , Arnd Bergmann , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Joe Perches , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal Marek , linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org Message-ID: <20150213114758._YUeYlwLE_UyE-bIYk8fQsq_M0N5ZqqIg9OIfUzcm9o@z> Hi Maxime, Am Donnerstag, den 12.02.2015, 18:46 +0100 schrieb Maxime Coquelin: [...] > + soc { > + reset_ahb1: reset@40023810 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023810 0x4>; > + }; > + > + reset_ahb2: reset@40023814 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023814 0x4>; > + }; > + > + reset_ahb3: reset@40023818 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023818 0x4>; > + }; > + > + reset_apb1: reset@40023820 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023820 0x4>; > + }; > + > + reset_apb2: reset@40023824 { > + #reset-cells = <1>; > + compatible = "st,stm32-reset"; > + reg = <0x40023824 0x4>; > + }; These are mostly consecutive, single registers. I wonder if these are part of the same IP block and thus should be grouped together into the same reset controller node? regards Philipp