Re: [PATCH] Document Linux's memory barriers [try #2]

Paul Mackerras
2006-03-09T00:35:34Z

David Howells writes:

> On NUMA PowerPC, should mmiowb() be a SYNC or an EIEIO instruction then? Those
> do inter-component synchronisation.

We actually have quite heavy synchronization in read*/write* on PPC,
and mmiowb can safely be a no-op. It would be nice to be able to have
lighter-weight synchronization, but I'm sure we would see lots of
subtle driver bugs cropping up if we did. write* do a full memory
barrier (sync) after the store, and read* explicitly wait for the data
to come back before.

If you ask me, the need for mmiowb on some platforms merely shows that
those platforms' implementations of spinlocks and read*/write* are
buggy...

Paul.