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Mon, 05 Feb 2024 01:42:25 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCVAw/xLjlQM+28QDwdq1MsEgdFi6kuUzxJ+5aV9wn2ov8NcMPI3QXQGYKuFg2s00FNJmZj3DM6z/NHKtAklQU8dI18Blq82WU0bqkDrpvQjs/mFhZwc0fhbpgVU4f6Ek5MbU1gqW2IKaMn48v/DraUbOGc4VgAi2fsCIKwagttuo1JQCbSocQ9Okk4CqePkigWoGGQRz8oiHBoZZ9AJ5Wf2GpF0/lDIo1mfDpzrpbZ47mHCy+cKi7AXC8IqLQuW/hVVsx811HcyTh/8f1RZbXX446sPi1b/HlZEjF5+zVhc8N0SQHcZRn/Yu0BnK+tZNOwe0ICUJtu9tmGaGe1NvxTR0xq/I7IAFg/9chWyIh0vj0A1QErdLWQxXuVkSjliQZpR3NQrh2rDLNKqk2U1O9Oi/R014JZksQChecr7R07sseS+dHOP1LAdtYfP1M7rGfkUf/9FXC6uD+Ymam51KfBH1aR5l74Bqmh96BjkgZt8qGNxywb3FJiWFBVjME4iXgNy782zAP0tEOgjcEQlkVaTn6284KCLhJoReLIKSqHaFQqbYX43Zzxwabc75/ND3xMKQNFttQLDEsY9g7EH8kUgoAkyQsmwQdQ7e1ENTeQ8dNiLl3Kq6wKIJjfWyoba1daY Received: from [192.168.0.173] ([79.115.63.202]) by smtp.gmail.com with ESMTPSA id p4-20020a5d4e04000000b0033b3ceda5dbsm1920230wrt.44.2024.02.05.01.42.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 05 Feb 2024 01:42:25 -0800 (PST) Message-ID: <144a0bed-6ba2-480c-b377-16364522845c@linaro.org> Date: Mon, 5 Feb 2024 11:42:21 +0200 Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 05/28] spi: dt-bindings: samsung: add samsung,spi-fifosize property Content-Language: en-US To: Rob Herring Cc: Mark Brown , andi.shyti@kernel.org, arnd@arndb.de, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com References: <20240125145007.748295-1-tudor.ambarus@linaro.org> <20240125145007.748295-6-tudor.ambarus@linaro.org> <7ef86704-3e40-4d39-a69d-a30719c96660@sirena.org.uk> <1c58deef-bc0f-4889-bf40-54168ce9ff7c@linaro.org> <55af5d4a-7bc9-4ae7-88c5-5acae4666450@sirena.org.uk> <96f9306f-3445-484b-bd3c-82e708681f1b@linaro.org> <20240130222536.GA2523173-robh@kernel.org> From: Tudor Ambarus In-Reply-To: <20240130222536.GA2523173-robh@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Rob, On 31.01.2024 00:25, Rob Herring wrote: > On Thu, Jan 25, 2024 at 07:01:10PM +0000, Tudor Ambarus wrote: >> >> >> On 1/25/24 17:45, Mark Brown wrote: >>> On Thu, Jan 25, 2024 at 05:30:53PM +0000, Tudor Ambarus wrote: >>>> On 1/25/24 17:26, Mark Brown wrote: >>> >>>>> OK, so just the compatible is enough information then? >>> >>>> For gs101, yes. All the gs101 SPI instances are configured with 64 bytes >>>> FIFO depths. So instead of specifying the FIFO depth for each SPI node, >>>> we can infer the FIFO depth from the compatible. >>> >>> But this is needed for other SoCs? This change is scattered through a >> >> There are SoCs that have multiple instances of the SPI IP, and they >> configure them with different FIFO depths. See >> "samsung,exynosautov9-spi" for example: SPI0, SPI1, and SPI6 are >> configured by the SoC to use 256 bytes FIFO depths, while all the other >> 8 SPI instances use 64 bytes FIFOs. I tried to explain the entire logic >> of the series in another reply, see it here: >> https://lore.kernel.org/linux-arm-kernel/40ba9481-4aea-4a72-87bd-c2db319be069@linaro.org/T/#u > > We have some common properties for fifo size. In fact, there was just a > discussion recently on Samsung UART (Is that the same block?) about It is the same block, I'll take a look. > this. So if you do use a property here, use a common one. Will do. Thanks, Rob! Cheers, ta