From: Dave Martin <Dave.Martin@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-arch@vger.kernel.org,
Okamoto Takayuki <tokamoto@jp.fujitsu.com>,
libc-alpha@sourceware.org,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Richard Sandiford <richard.sandiford@arm.com>,
kvmarm@lists.cs.columbia.edu
Subject: [PATCH v3 20/28] arm64/sve: Add prctl controls for userspace vector length management
Date: Tue, 10 Oct 2017 19:38:37 +0100 [thread overview]
Message-ID: <1507660725-7986-21-git-send-email-Dave.Martin@arm.com> (raw)
In-Reply-To: <1507660725-7986-1-git-send-email-Dave.Martin@arm.com>
This patch adds two arm64-specific prctls, to permit userspace to
control its vector length:
* PR_SVE_SET_VL: set the thread's SVE vector length and vector
length inheritance mode.
* PR_SVE_GET_VL: get the same information.
Although these calls shadow instruction set features in the SVE
architecture, these prctls provide additional control: the vector
length inheritance mode is Linux-specific and nothing to do with
the architecture, and the architecture does not permit EL0 to set
its own vector length directly. Both can be used in portable tools
without requiring the use of SVE instructions.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Cc: Alex Bennée <alex.bennee@linaro.org>
---
Dropped Alex Bennée's Reviewed-by, since there are non-trivial changes
since v2.
Changes since v2
----------------
Bug fixes:
* Remove preempt_disable() from sve_set_current_vl(), since it's
(a) wrong, and (b) moved to sve_set_vector_length().
This was a legacy from before migration to allowing kernel_neon_begin()
in softirq.
ABI changes:
* Changed return value of PR_SVE_SET_VL to encode the vector length
deferred for the next exec, when PR_SVE_SET_VL_ONEXEC is passed.
This allows a caller to probe for supported VLs without
changing the current VL.
Without this change, the return value is not very informative
in this case, since the current VL doesn't change.
Without PR_SVE_SET_VL_ONEXEC, the new current VL is returned,
as in v2.
---
arch/arm64/include/asm/fpsimd.h | 14 +++++++++++
arch/arm64/include/asm/processor.h | 4 +++
arch/arm64/kernel/fpsimd.c | 50 ++++++++++++++++++++++++++++++++++++++
include/uapi/linux/prctl.h | 4 +++
kernel/sys.c | 12 +++++++++
5 files changed, 84 insertions(+)
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index ee6db38..3cfdfbe 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -17,6 +17,7 @@
#define __ASM_FP_H
#include <asm/ptrace.h>
+#include <asm/errno.h>
#ifndef __ASSEMBLY__
@@ -99,6 +100,9 @@ extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);
extern int sve_set_vector_length(struct task_struct *task,
unsigned long vl, unsigned long flags);
+extern int sve_set_current_vl(unsigned long arg);
+extern int sve_get_current_vl(void);
+
/*
* Probing and setup functions.
* Calls to these functions must be serialised with one another.
@@ -116,6 +120,16 @@ static void __maybe_unused sve_sync_to_fpsimd(struct task_struct *task) { }
static void __maybe_unused sve_sync_from_fpsimd_zeropad(
struct task_struct *task) { }
+static int __maybe_unused sve_set_current_vl(unsigned long arg)
+{
+ return -EINVAL;
+}
+
+static int __maybe_unused sve_get_current_vl(void)
+{
+ return -EINVAL;
+}
+
static void __maybe_unused sve_init_vq_map(void) { }
static void __maybe_unused sve_update_vq_map(void) { }
static int __maybe_unused sve_verify_vq_map(void) { return 0; }
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 3faceac..df66452 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -197,4 +197,8 @@ static inline void spin_lock_prefetch(const void *ptr)
int cpu_enable_pan(void *__unused);
int cpu_enable_cache_maint_trap(void *__unused);
+/* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
+#define SVE_SET_VL(arg) sve_set_current_vl(arg)
+#define SVE_GET_VL() sve_get_current_vl()
+
#endif /* __ASM_PROCESSOR_H */
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 6db9f30..2c23e4a 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -28,6 +28,7 @@
#include <linux/irqflags.h>
#include <linux/init.h>
#include <linux/percpu.h>
+#include <linux/prctl.h>
#include <linux/preempt.h>
#include <linux/prctl.h>
#include <linux/ptrace.h>
@@ -569,6 +570,55 @@ int sve_set_vector_length(struct task_struct *task,
}
/*
+ * Encode the current vector length and flags for return.
+ * This is only required for prctl(): ptrace has separate fields
+ *
+ * flags are as for sve_set_vector_length().
+ */
+static int sve_prctl_status(unsigned long flags)
+{
+ int ret;
+
+ if (flags & PR_SVE_SET_VL_ONEXEC)
+ ret = current->thread.sve_vl_onexec;
+ else
+ ret = current->thread.sve_vl;
+
+ if (test_thread_flag(TIF_SVE_VL_INHERIT))
+ ret |= PR_SVE_VL_INHERIT;
+
+ return ret;
+}
+
+/* PR_SVE_SET_VL */
+int sve_set_current_vl(unsigned long arg)
+{
+ unsigned long vl, flags;
+ int ret;
+
+ vl = arg & PR_SVE_VL_LEN_MASK;
+ flags = arg & ~vl;
+
+ if (!system_supports_sve())
+ return -EINVAL;
+
+ ret = sve_set_vector_length(current, vl, flags);
+ if (ret)
+ return ret;
+
+ return sve_prctl_status(flags);
+}
+
+/* PR_SVE_GET_VL */
+int sve_get_current_vl(void)
+{
+ if (!system_supports_sve())
+ return -EINVAL;
+
+ return sve_prctl_status(0);
+}
+
+/*
* Bitmap for temporary storage of the per-CPU set of supported vector lengths
* during secondary boot.
*/
diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
index 1b64901..1ef9370 100644
--- a/include/uapi/linux/prctl.h
+++ b/include/uapi/linux/prctl.h
@@ -198,7 +198,11 @@ struct prctl_mm_map {
# define PR_CAP_AMBIENT_CLEAR_ALL 4
/* arm64 Scalable Vector Extension controls */
+/* Flag values must be kept in sync with ptrace NT_ARM_SVE interface */
+#define PR_SVE_SET_VL 48 /* set task vector length */
# define PR_SVE_SET_VL_ONEXEC (1 << 18) /* defer effect until exec */
+#define PR_SVE_GET_VL 49 /* get task vector length */
+/* Bits common to PR_SVE_SET_VL and PR_SVE_GET_VL */
# define PR_SVE_VL_LEN_MASK 0xffff
# define PR_SVE_VL_INHERIT (1 << 17) /* inherit across exec */
diff --git a/kernel/sys.c b/kernel/sys.c
index 9aebc29..c541916 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -110,6 +110,12 @@
#ifndef SET_FP_MODE
# define SET_FP_MODE(a,b) (-EINVAL)
#endif
+#ifndef SVE_SET_VL
+# define SVE_SET_VL(a) (-EINVAL)
+#endif
+#ifndef SVE_GET_VL
+# define SVE_GET_VL() (-EINVAL)
+#endif
/*
* this is where the system-wide overflow UID and GID are defined, for
@@ -2385,6 +2391,12 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
case PR_GET_FP_MODE:
error = GET_FP_MODE(me);
break;
+ case PR_SVE_SET_VL:
+ error = SVE_SET_VL(arg2);
+ break;
+ case PR_SVE_GET_VL:
+ error = SVE_GET_VL();
+ break;
default:
error = -EINVAL;
break;
--
2.1.4
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Dave Martin <Dave.Martin@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: "Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will.deacon@arm.com>,
"Ard Biesheuvel" <ard.biesheuvel@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Szabolcs Nagy" <szabolcs.nagy@arm.com>,
"Richard Sandiford" <richard.sandiford@arm.com>,
"Okamoto Takayuki" <tokamoto@jp.fujitsu.com>,
kvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org,
linux-arch@vger.kernel.org
Subject: [PATCH v3 20/28] arm64/sve: Add prctl controls for userspace vector length management
Date: Tue, 10 Oct 2017 19:38:37 +0100 [thread overview]
Message-ID: <1507660725-7986-21-git-send-email-Dave.Martin@arm.com> (raw)
Message-ID: <20171010183837.4CwOLiUn4eh7yxNmVaHa_Mq9kTLpk8Ks6caR_ZAU2Ks@z> (raw)
In-Reply-To: <1507660725-7986-1-git-send-email-Dave.Martin@arm.com>
This patch adds two arm64-specific prctls, to permit userspace to
control its vector length:
* PR_SVE_SET_VL: set the thread's SVE vector length and vector
length inheritance mode.
* PR_SVE_GET_VL: get the same information.
Although these calls shadow instruction set features in the SVE
architecture, these prctls provide additional control: the vector
length inheritance mode is Linux-specific and nothing to do with
the architecture, and the architecture does not permit EL0 to set
its own vector length directly. Both can be used in portable tools
without requiring the use of SVE instructions.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Cc: Alex Bennée <alex.bennee@linaro.org>
---
Dropped Alex Bennée's Reviewed-by, since there are non-trivial changes
since v2.
Changes since v2
----------------
Bug fixes:
* Remove preempt_disable() from sve_set_current_vl(), since it's
(a) wrong, and (b) moved to sve_set_vector_length().
This was a legacy from before migration to allowing kernel_neon_begin()
in softirq.
ABI changes:
* Changed return value of PR_SVE_SET_VL to encode the vector length
deferred for the next exec, when PR_SVE_SET_VL_ONEXEC is passed.
This allows a caller to probe for supported VLs without
changing the current VL.
Without this change, the return value is not very informative
in this case, since the current VL doesn't change.
Without PR_SVE_SET_VL_ONEXEC, the new current VL is returned,
as in v2.
---
arch/arm64/include/asm/fpsimd.h | 14 +++++++++++
arch/arm64/include/asm/processor.h | 4 +++
arch/arm64/kernel/fpsimd.c | 50 ++++++++++++++++++++++++++++++++++++++
include/uapi/linux/prctl.h | 4 +++
kernel/sys.c | 12 +++++++++
5 files changed, 84 insertions(+)
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index ee6db38..3cfdfbe 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -17,6 +17,7 @@
#define __ASM_FP_H
#include <asm/ptrace.h>
+#include <asm/errno.h>
#ifndef __ASSEMBLY__
@@ -99,6 +100,9 @@ extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);
extern int sve_set_vector_length(struct task_struct *task,
unsigned long vl, unsigned long flags);
+extern int sve_set_current_vl(unsigned long arg);
+extern int sve_get_current_vl(void);
+
/*
* Probing and setup functions.
* Calls to these functions must be serialised with one another.
@@ -116,6 +120,16 @@ static void __maybe_unused sve_sync_to_fpsimd(struct task_struct *task) { }
static void __maybe_unused sve_sync_from_fpsimd_zeropad(
struct task_struct *task) { }
+static int __maybe_unused sve_set_current_vl(unsigned long arg)
+{
+ return -EINVAL;
+}
+
+static int __maybe_unused sve_get_current_vl(void)
+{
+ return -EINVAL;
+}
+
static void __maybe_unused sve_init_vq_map(void) { }
static void __maybe_unused sve_update_vq_map(void) { }
static int __maybe_unused sve_verify_vq_map(void) { return 0; }
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 3faceac..df66452 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -197,4 +197,8 @@ static inline void spin_lock_prefetch(const void *ptr)
int cpu_enable_pan(void *__unused);
int cpu_enable_cache_maint_trap(void *__unused);
+/* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
+#define SVE_SET_VL(arg) sve_set_current_vl(arg)
+#define SVE_GET_VL() sve_get_current_vl()
+
#endif /* __ASM_PROCESSOR_H */
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 6db9f30..2c23e4a 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -28,6 +28,7 @@
#include <linux/irqflags.h>
#include <linux/init.h>
#include <linux/percpu.h>
+#include <linux/prctl.h>
#include <linux/preempt.h>
#include <linux/prctl.h>
#include <linux/ptrace.h>
@@ -569,6 +570,55 @@ int sve_set_vector_length(struct task_struct *task,
}
/*
+ * Encode the current vector length and flags for return.
+ * This is only required for prctl(): ptrace has separate fields
+ *
+ * flags are as for sve_set_vector_length().
+ */
+static int sve_prctl_status(unsigned long flags)
+{
+ int ret;
+
+ if (flags & PR_SVE_SET_VL_ONEXEC)
+ ret = current->thread.sve_vl_onexec;
+ else
+ ret = current->thread.sve_vl;
+
+ if (test_thread_flag(TIF_SVE_VL_INHERIT))
+ ret |= PR_SVE_VL_INHERIT;
+
+ return ret;
+}
+
+/* PR_SVE_SET_VL */
+int sve_set_current_vl(unsigned long arg)
+{
+ unsigned long vl, flags;
+ int ret;
+
+ vl = arg & PR_SVE_VL_LEN_MASK;
+ flags = arg & ~vl;
+
+ if (!system_supports_sve())
+ return -EINVAL;
+
+ ret = sve_set_vector_length(current, vl, flags);
+ if (ret)
+ return ret;
+
+ return sve_prctl_status(flags);
+}
+
+/* PR_SVE_GET_VL */
+int sve_get_current_vl(void)
+{
+ if (!system_supports_sve())
+ return -EINVAL;
+
+ return sve_prctl_status(0);
+}
+
+/*
* Bitmap for temporary storage of the per-CPU set of supported vector lengths
* during secondary boot.
*/
diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
index 1b64901..1ef9370 100644
--- a/include/uapi/linux/prctl.h
+++ b/include/uapi/linux/prctl.h
@@ -198,7 +198,11 @@ struct prctl_mm_map {
# define PR_CAP_AMBIENT_CLEAR_ALL 4
/* arm64 Scalable Vector Extension controls */
+/* Flag values must be kept in sync with ptrace NT_ARM_SVE interface */
+#define PR_SVE_SET_VL 48 /* set task vector length */
# define PR_SVE_SET_VL_ONEXEC (1 << 18) /* defer effect until exec */
+#define PR_SVE_GET_VL 49 /* get task vector length */
+/* Bits common to PR_SVE_SET_VL and PR_SVE_GET_VL */
# define PR_SVE_VL_LEN_MASK 0xffff
# define PR_SVE_VL_INHERIT (1 << 17) /* inherit across exec */
diff --git a/kernel/sys.c b/kernel/sys.c
index 9aebc29..c541916 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -110,6 +110,12 @@
#ifndef SET_FP_MODE
# define SET_FP_MODE(a,b) (-EINVAL)
#endif
+#ifndef SVE_SET_VL
+# define SVE_SET_VL(a) (-EINVAL)
+#endif
+#ifndef SVE_GET_VL
+# define SVE_GET_VL() (-EINVAL)
+#endif
/*
* this is where the system-wide overflow UID and GID are defined, for
@@ -2385,6 +2391,12 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
case PR_GET_FP_MODE:
error = GET_FP_MODE(me);
break;
+ case PR_SVE_SET_VL:
+ error = SVE_SET_VL(arg2);
+ break;
+ case PR_SVE_GET_VL:
+ error = SVE_GET_VL();
+ break;
default:
error = -EINVAL;
break;
--
2.1.4
next prev parent reply other threads:[~2017-10-10 18:38 UTC|newest]
Thread overview: 155+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-10 18:38 [PATCH v3 00/28] ARM Scalable Vector Extension (SVE) Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 01/28] regset: Add support for dynamically sized regsets Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 14:14 ` Catalin Marinas
2017-10-11 14:45 ` Dave Martin
2017-10-11 14:45 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 02/28] arm64: KVM: Hide unsupported AArch64 CPU features from guests Dave Martin
2017-10-11 14:14 ` Catalin Marinas
2017-10-11 16:21 ` Marc Zyngier
2017-10-11 16:21 ` Marc Zyngier
2017-10-17 13:51 ` Christoffer Dall
2017-10-17 14:08 ` Marc Zyngier
2017-10-18 13:20 ` Christoffer Dall
2017-10-18 13:20 ` Christoffer Dall
2017-10-18 14:45 ` Dave Martin
2017-10-18 19:19 ` Christoffer Dall
2017-10-10 18:38 ` [PATCH v3 03/28] arm64: efi: Add missing Kconfig dependency on KERNEL_MODE_NEON Dave Martin
2017-10-11 14:16 ` Catalin Marinas
2017-10-11 14:35 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 04/28] arm64: Port deprecated instruction emulation to new sysctl interface Dave Martin
2017-10-11 14:17 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 05/28] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag() Dave Martin
2017-10-10 18:38 ` [PATCH v3 05/28] arm64: fpsimd: Simplify uses of {set,clear}_ti_thread_flag() Dave Martin
2017-10-11 14:19 ` [PATCH v3 05/28] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag() Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 06/28] arm64/sve: System register and exception syndrome definitions Dave Martin
2017-10-11 14:20 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 07/28] arm64/sve: Low-level SVE architectural state manipulation functions Dave Martin
2017-10-11 14:28 ` Catalin Marinas
2017-10-11 14:28 ` Catalin Marinas
2017-10-11 14:39 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 08/28] arm64/sve: Kconfig update and conditional compilation support Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 14:29 ` Catalin Marinas
2017-10-11 14:29 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 09/28] arm64/sve: Signal frame and context structure definition Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 14:29 ` Catalin Marinas
2017-10-11 14:29 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 10/28] arm64/sve: Low-level CPU setup Dave Martin
2017-10-11 14:30 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 11/28] arm64/sve: Core task context handling Dave Martin
2017-10-11 16:15 ` Catalin Marinas
2017-10-12 16:05 ` Dave Martin
2017-10-13 13:57 ` Catalin Marinas
2017-10-13 17:53 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 12/28] arm64/sve: Support vector length resetting for new processes Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 16:16 ` Catalin Marinas
2017-10-11 16:16 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 13/28] arm64/sve: Signal handling support Dave Martin
2017-10-11 16:40 ` Catalin Marinas
2017-10-12 16:11 ` Dave Martin
2017-10-13 11:17 ` Catalin Marinas
2017-10-13 11:17 ` Catalin Marinas
2017-10-13 14:26 ` Dave Martin
2017-10-10 18:38 ` [PATCH v3 14/28] arm64/sve: Backend logic for setting the vector length Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 16:43 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 15/28] arm64: cpufeature: Move sys_caps_initialised declarations Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 16:50 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 16/28] arm64/sve: Probe SVE capabilities and usable vector lengths Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 16:55 ` Catalin Marinas
2017-10-12 12:56 ` Suzuki K Poulose
2017-10-16 15:46 ` Dave Martin
2017-10-16 15:46 ` Dave Martin
2017-10-16 16:27 ` Suzuki K Poulose
2017-10-16 16:27 ` Suzuki K Poulose
2017-10-16 16:44 ` Dave Martin
2017-10-16 16:44 ` Dave Martin
2017-10-16 16:47 ` Suzuki K Poulose
2017-10-16 16:47 ` Suzuki K Poulose
2017-10-16 16:55 ` Dave Martin
2017-10-16 16:58 ` Suzuki K Poulose
2017-10-10 18:38 ` [PATCH v3 17/28] arm64/sve: Preserve SVE registers around kernel-mode NEON use Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-12 10:15 ` Catalin Marinas
2017-10-12 10:15 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 18/28] arm64/sve: Preserve SVE registers around EFI runtime service calls Dave Martin
2017-10-12 10:57 ` Catalin Marinas
2017-10-12 10:57 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 19/28] arm64/sve: ptrace and ELF coredump support Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-12 17:06 ` Catalin Marinas
2017-10-13 16:16 ` Dave Martin
2017-10-13 16:16 ` Dave Martin
2017-10-18 10:32 ` Catalin Marinas
2017-10-18 16:02 ` Dave Martin
2017-10-10 18:38 ` Dave Martin [this message]
2017-10-10 18:38 ` [PATCH v3 20/28] arm64/sve: Add prctl controls for userspace vector length management Dave Martin
2017-10-12 17:11 ` Catalin Marinas
2017-10-12 17:11 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 21/28] arm64/sve: Add sysctl to set the default vector length for new processes Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-12 17:11 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 22/28] arm64/sve: KVM: Prevent guests from using SVE Dave Martin
2017-10-11 16:28 ` Marc Zyngier
2017-10-12 11:04 ` Dave Martin
2017-10-12 11:28 ` Marc Zyngier
2017-10-13 14:15 ` Dave Martin
2017-10-13 14:21 ` Marc Zyngier
2017-10-13 16:47 ` Dave Martin
2017-10-12 17:13 ` Catalin Marinas
2017-10-17 11:50 ` Christoffer Dall
2017-10-17 11:50 ` Christoffer Dall
2017-10-17 14:31 ` Dave Martin
2017-10-17 14:31 ` Dave Martin
2017-10-18 13:23 ` Christoffer Dall
2017-10-18 13:23 ` Christoffer Dall
2017-10-18 15:00 ` Dave Martin
2017-10-18 15:00 ` Dave Martin
2017-10-18 19:22 ` Christoffer Dall
2017-10-18 19:22 ` Christoffer Dall
2017-10-10 18:38 ` [PATCH v3 23/28] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution Dave Martin
2017-10-12 17:13 ` Catalin Marinas
2017-10-17 13:58 ` Christoffer Dall
2017-10-10 18:38 ` [PATCH v3 24/28] arm64/sve: KVM: Hide SVE from CPU features exposed to guests Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 16:31 ` Marc Zyngier
2017-10-12 17:13 ` Catalin Marinas
2017-10-17 13:58 ` Christoffer Dall
2017-10-17 13:58 ` Christoffer Dall
2017-10-17 14:07 ` Dave Martin
2017-10-17 14:29 ` Marc Zyngier
2017-10-17 14:29 ` Marc Zyngier
2017-10-17 15:47 ` Dave Martin
2017-10-18 13:21 ` Christoffer Dall
2017-10-18 13:21 ` Christoffer Dall
2017-10-18 15:01 ` Dave Martin
2017-10-18 15:01 ` Dave Martin
2017-10-18 16:49 ` Christoffer Dall
2017-10-18 16:49 ` Christoffer Dall
2017-10-10 18:38 ` [PATCH v3 25/28] arm64/sve: Detect SVE and activate runtime support Dave Martin
2017-10-11 17:11 ` Suzuki K Poulose
2017-10-12 17:14 ` Catalin Marinas
2017-10-12 17:14 ` Catalin Marinas
2017-10-10 18:38 ` [PATCH v3 26/28] arm64/sve: Add documentation Dave Martin
2017-10-10 18:38 ` Dave Martin
2017-10-11 9:50 ` Szabolcs Nagy
[not found] ` <59DDE958.4080605-5wv7dgnIgG8@public.gmane.org>
2017-10-11 11:08 ` Dave Martin
2017-10-11 11:08 ` Dave Martin
[not found] ` <20171011110811.GB19485-M5GwZQ6tE7x5pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2017-10-11 11:30 ` Szabolcs Nagy
2017-10-11 11:30 ` Szabolcs Nagy
2017-10-13 14:24 ` Catalin Marinas
2017-10-13 17:17 ` Dave Martin
[not found] ` <20171013171758.GO19485-M5GwZQ6tE7x5pKCnmE3YQBJ8xKzm50AiAL8bYrjMMd8@public.gmane.org>
2017-10-18 9:32 ` Catalin Marinas
2017-10-18 9:32 ` Catalin Marinas
[not found] ` <20171013142421.j32jzisukewxtosx-+1aNUgJU5qkijLcmloz0ER/iLCjYCKR+VpNB7YpNyf8@public.gmane.org>
2017-10-13 17:35 ` Dave Martin
2017-10-13 17:35 ` Dave Martin
2017-10-10 18:38 ` [RFC PATCH v3 27/28] arm64: signal: Report signal frame size to userspace via auxv Dave Martin
2017-10-11 10:19 ` Szabolcs Nagy
2017-10-11 13:14 ` Dave P Martin
2017-10-10 18:38 ` [RFC PATCH v3 28/28] arm64/sve: signal: Include SVE when computing AT_MINSIGSTKSZ Dave Martin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1507660725-7986-21-git-send-email-Dave.Martin@arm.com \
--to=dave.martin@arm.com \
--cc=ard.biesheuvel@linaro.org \
--cc=catalin.marinas@arm.com \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=libc-alpha@sourceware.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=richard.sandiford@arm.com \
--cc=szabolcs.nagy@arm.com \
--cc=tokamoto@jp.fujitsu.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).