Generic Linux architectural discussions
 help / color / mirror / Atom feed
diff for duplicates of <1522234731-27397-1-git-send-email-cpandya@codeaurora.org>

diff --git a/a/1.txt b/N1/1.txt
index 67cf02f..2fd36e9 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -7,44 +7,3 @@ based SoC.
 
 These patches can also go into '-stable' branch (if accepted)
 for 4.6 onwards.
-
-From V5->V6:
- - Use __flush_tlb_kernel_pgtable() for both PUD and PMD. Remove
-   "bool tlb_inv" based variance as it is not need now
- - Re-naming for consistency
-
-From V4->V5:
- - Add new API __flush_tlb_kernel_pgtable(unsigned long addr)
-   for kernel addresses
-
-From V3->V4:
- - Add header for 'addr' in x86 implementation
- - Re-order pmd/pud clear and table free
- - Avoid redundant TLB invalidatation in one perticular case
-
-From V2->V3:
- - Use the exisiting page table free interface to do arm64
-   specific things
-
-From V1->V2:
- - Rebased my patches on top of "[PATCH v2 1/2] mm/vmalloc:
-   Add interfaces to free unmapped page table"
- - Honored BBM for ARM64
-
-Chintan Pandya (4):
-  ioremap: Update pgtable free interfaces with addr
-  arm64: tlbflush: Introduce __flush_tlb_kernel_pgtable
-  arm64: Implement page table free interfaces
-  Revert "arm64: Enforce BBM for huge IO/VMAP mappings"
-
- arch/arm64/include/asm/tlbflush.h |  6 ++++++
- arch/arm64/mm/mmu.c               | 37 +++++++++++++++++++++++++------------
- arch/x86/mm/pgtable.c             |  6 ++++--
- include/asm-generic/pgtable.h     |  8 ++++----
- lib/ioremap.c                     |  4 ++--
- 5 files changed, 41 insertions(+), 20 deletions(-)
-
--- 
-Qualcomm India Private Limited, on behalf of Qualcomm Innovation
-Center, Inc., is a member of Code Aurora Forum, a Linux Foundation
-Collaborative Project
diff --git a/a/content_digest b/N1/content_digest
index c41f1e0..acb51f4 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -28,47 +28,6 @@
  "based SoC.\n"
  "\n"
  "These patches can also go into '-stable' branch (if accepted)\n"
- "for 4.6 onwards.\n"
- "\n"
- "From V5->V6:\n"
- " - Use __flush_tlb_kernel_pgtable() for both PUD and PMD. Remove\n"
- "   \"bool tlb_inv\" based variance as it is not need now\n"
- " - Re-naming for consistency\n"
- "\n"
- "From V4->V5:\n"
- " - Add new API __flush_tlb_kernel_pgtable(unsigned long addr)\n"
- "   for kernel addresses\n"
- "\n"
- "From V3->V4:\n"
- " - Add header for 'addr' in x86 implementation\n"
- " - Re-order pmd/pud clear and table free\n"
- " - Avoid redundant TLB invalidatation in one perticular case\n"
- "\n"
- "From V2->V3:\n"
- " - Use the exisiting page table free interface to do arm64\n"
- "   specific things\n"
- "\n"
- "From V1->V2:\n"
- " - Rebased my patches on top of \"[PATCH v2 1/2] mm/vmalloc:\n"
- "   Add interfaces to free unmapped page table\"\n"
- " - Honored BBM for ARM64\n"
- "\n"
- "Chintan Pandya (4):\n"
- "  ioremap: Update pgtable free interfaces with addr\n"
- "  arm64: tlbflush: Introduce __flush_tlb_kernel_pgtable\n"
- "  arm64: Implement page table free interfaces\n"
- "  Revert \"arm64: Enforce BBM for huge IO/VMAP mappings\"\n"
- "\n"
- " arch/arm64/include/asm/tlbflush.h |  6 ++++++\n"
- " arch/arm64/mm/mmu.c               | 37 +++++++++++++++++++++++++------------\n"
- " arch/x86/mm/pgtable.c             |  6 ++++--\n"
- " include/asm-generic/pgtable.h     |  8 ++++----\n"
- " lib/ioremap.c                     |  4 ++--\n"
- " 5 files changed, 41 insertions(+), 20 deletions(-)\n"
- "\n"
- "-- \n"
- "Qualcomm India Private Limited, on behalf of Qualcomm Innovation\n"
- "Center, Inc., is a member of Code Aurora Forum, a Linux Foundation\n"
- Collaborative Project
+ for 4.6 onwards.
 
-4149daf5741d37a80419940e7b64e3daeecbc77dfc938efacb29e4b714bcd60a
+f9c37177bd9b9e5da122b9c05dbefaa4d44e9de18b9371e5c876113f48fd62f2

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox