From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chintan Pandya Subject: [PATCH v9 3/4] arm64: Implement page table free interfaces Date: Mon, 30 Apr 2018 13:11:33 +0530 Message-ID: <1525074094-25839-4-git-send-email-cpandya@codeaurora.org> References: <1525074094-25839-1-git-send-email-cpandya@codeaurora.org> Return-path: In-Reply-To: <1525074094-25839-1-git-send-email-cpandya@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org To: Will Deacon , Arnd Bergmann , Mark Rutland , Ard Biesheuvel , Marc Zyngier , Andrew Morton Cc: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Philip Elcan , James Morse , Kristina Martsenko , Toshi Kani , Dave Hansen , Vitaly Kuznetsov , Joerg Roedel , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, Chintan Pandya List-Id: linux-arch.vger.kernel.org Implement pud_free_pmd_page() and pmd_free_pte_page(). Implementation requires, 1) Clearing off the current pud/pmd entry 2) Invalidate TLB which could have previously valid but not stale entry 3) Freeing of the un-used next level page tables Signed-off-by: Chintan Pandya --- arch/arm64/mm/mmu.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index da98828..0f651db 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -45,6 +45,7 @@ #include #include #include +#include #define NO_BLOCK_MAPPINGS BIT(0) #define NO_CONT_MAPPINGS BIT(1) @@ -973,12 +974,32 @@ int pmd_clear_huge(pmd_t *pmdp) return 1; } -int pud_free_pmd_page(pud_t *pud, unsigned long addr) +int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr) { - return pud_none(*pud); + pmd_t *table; + + if (pmd_present(READ_ONCE(*pmdp))) { + table = __va(pmd_val(*pmdp)); + pmd_clear(pmdp); + __flush_tlb_kernel_pgtable(addr); + free_page((unsigned long) table); + } + return 1; } -int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) +int pud_free_pmd_page(pud_t *pudp, unsigned long addr) { - return pmd_none(*pmd); + pmd_t *table; + int i; + + if (pud_present(READ_ONCE(*pudp))) { + table = __va(pud_val(*pudp)); + for (i = 0; i < PTRS_PER_PMD; i++) + pmd_free_pte_page(&table[i], addr + (i * PMD_SIZE)); + + pud_clear(pudp); + __flush_tlb_kernel_pgtable(addr); + free_page((unsigned long) table); + } + return 1; } -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.codeaurora.org ([198.145.29.96]:47696 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752348AbeD3Hmb (ORCPT ); Mon, 30 Apr 2018 03:42:31 -0400 From: Chintan Pandya Subject: [PATCH v9 3/4] arm64: Implement page table free interfaces Date: Mon, 30 Apr 2018 13:11:33 +0530 Message-ID: <1525074094-25839-4-git-send-email-cpandya@codeaurora.org> In-Reply-To: <1525074094-25839-1-git-send-email-cpandya@codeaurora.org> References: <1525074094-25839-1-git-send-email-cpandya@codeaurora.org> Sender: linux-arch-owner@vger.kernel.org List-ID: To: Will Deacon , Arnd Bergmann , Mark Rutland , Ard Biesheuvel , Marc Zyngier , Andrew Morton Cc: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Philip Elcan , James Morse , Kristina Martsenko , Toshi Kani , Dave Hansen , Vitaly Kuznetsov , Joerg Roedel , Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, Chintan Pandya Message-ID: <20180430074133.TPfura-Si57dIBYTyLZ2XvNmdePS58_wN3vhsCbfFk8@z> Implement pud_free_pmd_page() and pmd_free_pte_page(). Implementation requires, 1) Clearing off the current pud/pmd entry 2) Invalidate TLB which could have previously valid but not stale entry 3) Freeing of the un-used next level page tables Signed-off-by: Chintan Pandya --- arch/arm64/mm/mmu.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index da98828..0f651db 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -45,6 +45,7 @@ #include #include #include +#include #define NO_BLOCK_MAPPINGS BIT(0) #define NO_CONT_MAPPINGS BIT(1) @@ -973,12 +974,32 @@ int pmd_clear_huge(pmd_t *pmdp) return 1; } -int pud_free_pmd_page(pud_t *pud, unsigned long addr) +int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr) { - return pud_none(*pud); + pmd_t *table; + + if (pmd_present(READ_ONCE(*pmdp))) { + table = __va(pmd_val(*pmdp)); + pmd_clear(pmdp); + __flush_tlb_kernel_pgtable(addr); + free_page((unsigned long) table); + } + return 1; } -int pmd_free_pte_page(pmd_t *pmd, unsigned long addr) +int pud_free_pmd_page(pud_t *pudp, unsigned long addr) { - return pmd_none(*pmd); + pmd_t *table; + int i; + + if (pud_present(READ_ONCE(*pudp))) { + table = __va(pud_val(*pudp)); + for (i = 0; i < PTRS_PER_PMD; i++) + pmd_free_pte_page(&table[i], addr + (i * PMD_SIZE)); + + pud_clear(pudp); + __flush_tlb_kernel_pgtable(addr); + free_page((unsigned long) table); + } + return 1; } -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project