From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pu Wen Subject: [PATCH v2 10/17] x86/events: enable Hygon support to PMU infrastructure Date: Mon, 23 Jul 2018 21:20:30 +0800 Message-ID: <1532352037-7151-11-git-send-email-puwen@hygon.cn> References: <1532352037-7151-1-git-send-email-puwen@hygon.cn> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1532352037-7151-1-git-send-email-puwen@hygon.cn> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" To: tglx@linutronix.de, bp@alien8.de, thomas.lendacky@amd.com, mingo@redhat.com, hpa@zytor.com, peterz@infradead.org, tony.luck@intel.com, pbonzini@redhat.com, rkrcmar@redhat.com, boris.ostrovsky@oracle.com, jgross@suse.com, rjw@rjwysocki.net, lenb@kernel.org, viresh.kumar@linaro.org, mchehab@kernel.org, trenn@suse.com, shuah@kernel.org, JBeulich@suse.com, x86@kernel.org Cc: linux-arch@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org List-Id: linux-arch.vger.kernel.org SHlnb24gUE1VIGFyY2ggaXMgc2ltaWxhciB0byBBTUQgRmFtaWx5IDE3aC4gVG8gc3VwcG9ydCBI eWdvbiBQTVUsIHRoZQppbml0aWFsaXphdGlvbiBmbG93IGZvciBpdCBqdXN0IGNhbGwgYW1kX3Bt dV9pbml0KCkgYW5kIGNoYW5nZSBQTVUgbmFtZQp0byAiSFlHT04iLiBUbyBzaGFyZSBBTUQncyBm bG93LCBhZGQgY29kZSBjaGVjayBmb3IgSHlnb24gZmFtaWx5IElEIDE4aAp0byBydW4gdGhlIGNv ZGUgcGF0aCBvZiBBTUQgZmFtaWx5IDE3aCBpbiBjb3JlL3VuY29yZSBmdW5jdGlvbnMuCgpTaWdu ZWQtb2ZmLWJ5OiBQdSBXZW4gPHB1d2VuQGh5Z29uLmNuPgotLS0KIGFyY2gveDg2L2V2ZW50cy9h bWQvY29yZS5jICAgfCAgNCArKysrCiBhcmNoL3g4Ni9ldmVudHMvYW1kL3VuY29yZS5jIHwgMTIg KysrKysrKy0tLS0tCiBhcmNoL3g4Ni9ldmVudHMvY29yZS5jICAgICAgIHwgIDQgKysrKwogMyBm aWxlcyBjaGFuZ2VkLCAxNSBpbnNlcnRpb25zKCspLCA1IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdp dCBhL2FyY2gveDg2L2V2ZW50cy9hbWQvY29yZS5jIGIvYXJjaC94ODYvZXZlbnRzL2FtZC9jb3Jl LmMKaW5kZXggYzg0NTg0Yi4uZDJiMjliZiAxMDA2NDQKLS0tIGEvYXJjaC94ODYvZXZlbnRzL2Ft ZC9jb3JlLmMKKysrIGIvYXJjaC94ODYvZXZlbnRzL2FtZC9jb3JlLmMKQEAgLTY2OSw2ICs2Njks MTAgQEAgc3RhdGljIGludCBfX2luaXQgYW1kX2NvcmVfcG11X2luaXQodm9pZCkKIAkJICogV2Ug ZmFsbGJhY2sgdG8gdXNpbmcgZGVmYXVsdCBhbWRfZ2V0X2V2ZW50X2NvbnN0cmFpbnRzLgogCQkg Ki8KIAkJYnJlYWs7CisJY2FzZSAweDE4OgorCQlwcl9jb250KCJGYW0xOGggIik7CisJCS8qIEZh bGxiYWNrIHRvIHVzaW5nIGRlZmF1bHQgYW1kX2dldF9ldmVudF9jb25zdHJhaW50cy4gKi8KKwkJ YnJlYWs7CiAJZGVmYXVsdDoKIAkJcHJfZXJyKCJjb3JlIHBlcmZjdHIgYnV0IG5vIGNvbnN0cmFp bnRzOyB1bmtub3duIGhhcmR3YXJlIVxuIik7CiAJCXJldHVybiAtRU5PREVWOwpkaWZmIC0tZ2l0 IGEvYXJjaC94ODYvZXZlbnRzL2FtZC91bmNvcmUuYyBiL2FyY2gveDg2L2V2ZW50cy9hbWQvdW5j b3JlLmMKaW5kZXggOTgxYmE1ZS4uOTJlYTI4MCAxMDA2NDQKLS0tIGEvYXJjaC94ODYvZXZlbnRz L2FtZC91bmNvcmUuYworKysgYi9hcmNoL3g4Ni9ldmVudHMvYW1kL3VuY29yZS5jCkBAIC01MDcs MTcgKzUwNywxOSBAQCBzdGF0aWMgaW50IF9faW5pdCBhbWRfdW5jb3JlX2luaXQodm9pZCkKIHsK IAlpbnQgcmV0ID0gLUVOT0RFVjsKIAotCWlmIChib290X2NwdV9kYXRhLng4Nl92ZW5kb3IgIT0g WDg2X1ZFTkRPUl9BTUQpCisJaWYgKGJvb3RfY3B1X2RhdGEueDg2X3ZlbmRvciAhPSBYODZfVkVO RE9SX0FNRCAmJgorCSAgICBib290X2NwdV9kYXRhLng4Nl92ZW5kb3IgIT0gWDg2X1ZFTkRPUl9I WUdPTikKIAkJcmV0dXJuIC1FTk9ERVY7CiAKIAlpZiAoIWJvb3RfY3B1X2hhcyhYODZfRkVBVFVS RV9UT1BPRVhUKSkKIAkJcmV0dXJuIC1FTk9ERVY7CiAKLQlpZiAoYm9vdF9jcHVfZGF0YS54ODYg PT0gMHgxNykgeworCWlmIChib290X2NwdV9kYXRhLng4NiA9PSAweDE3IHx8IGJvb3RfY3B1X2Rh dGEueDg2ID09IDB4MTgpIHsKIAkJLyoKLQkJICogRm9yIEYxN2gsIHRoZSBOb3J0aGJyaWRnZSBj b3VudGVycyBhcmUgcmVwdXJwb3NlZCBhcyBEYXRhCi0JCSAqIEZhYnJpYyBjb3VudGVycy4gQWxz bywgTDMgY291bnRlcnMgYXJlIHN1cHBvcnRlZCB0b28uIFRoZSBQTVVzCi0JCSAqIGFyZSBleHBv cnRlZCBiYXNlZCBvbiAgZmFtaWx5IGFzIGVpdGhlciBMMiBvciBMMyBhbmQgTkIgb3IgREYuCisJ CSAqIEZvciBGMTdoIG9yIEYxOGgsIHRoZSBOb3J0aGJyaWRnZSBjb3VudGVycyBhcmUKKwkJICog cmVwdXJwb3NlZCBhcyBEYXRhRmFicmljIGNvdW50ZXJzLiBBbHNvLCBMMyBjb3VudGVycworCQkg KiBhcmUgc3VwcG9ydGVkIHRvby4gVGhlIFBNVXMgYXJlIGV4cG9ydGVkIGJhc2VkIG9uCisJCSAq IGZhbWlseSBhcyBlaXRoZXIgTDIgb3IgTDMgYW5kIE5CIG9yIERGLgogCQkgKi8KIAkJbnVtX2Nv dW50ZXJzX25iCQkgID0gTlVNX0NPVU5URVJTX05COwogCQludW1fY291bnRlcnNfbGxjCSAgPSBO VU1fQ09VTlRFUlNfTDM7CmRpZmYgLS1naXQgYS9hcmNoL3g4Ni9ldmVudHMvY29yZS5jIGIvYXJj aC94ODYvZXZlbnRzL2NvcmUuYwppbmRleCA1ZjQ4MjlmLi45M2UwMjZiIDEwMDY0NAotLS0gYS9h cmNoL3g4Ni9ldmVudHMvY29yZS5jCisrKyBiL2FyY2gveDg2L2V2ZW50cy9jb3JlLmMKQEAgLTE3 NzYsNiArMTc3NiwxMCBAQCBzdGF0aWMgaW50IF9faW5pdCBpbml0X2h3X3BlcmZfZXZlbnRzKHZv aWQpCiAJY2FzZSBYODZfVkVORE9SX0FNRDoKIAkJZXJyID0gYW1kX3BtdV9pbml0KCk7CiAJCWJy ZWFrOworCWNhc2UgWDg2X1ZFTkRPUl9IWUdPTjoKKwkJZXJyID0gYW1kX3BtdV9pbml0KCk7CisJ CXg4Nl9wbXUubmFtZSA9ICJIWUdPTiI7CisJCWJyZWFrOwogCWRlZmF1bHQ6CiAJCWVyciA9IC1F Tk9UU1VQUDsKIAl9Ci0tIAoyLjcuNAoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fClhlbi1kZXZlbCBtYWlsaW5nIGxpc3QKWGVuLWRldmVsQGxpc3RzLnhl bnByb2plY3Qub3JnCmh0dHBzOi8vbGlzdHMueGVucHJvamVjdC5vcmcvbWFpbG1hbi9saXN0aW5m by94ZW4tZGV2ZWw= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp21.cstnet.cn ([159.226.251.21]:52155 "EHLO cstnet.cn" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388190AbeGWO3h (ORCPT ); Mon, 23 Jul 2018 10:29:37 -0400 From: Pu Wen Subject: [PATCH v2 10/17] x86/events: enable Hygon support to PMU infrastructure Date: Mon, 23 Jul 2018 21:20:30 +0800 Message-ID: <1532352037-7151-11-git-send-email-puwen@hygon.cn> In-Reply-To: <1532352037-7151-1-git-send-email-puwen@hygon.cn> References: <1532352037-7151-1-git-send-email-puwen@hygon.cn> Sender: linux-arch-owner@vger.kernel.org List-ID: To: tglx@linutronix.de, bp@alien8.de, thomas.lendacky@amd.com, mingo@redhat.com, hpa@zytor.com, peterz@infradead.org, tony.luck@intel.com, pbonzini@redhat.com, rkrcmar@redhat.com, boris.ostrovsky@oracle.com, jgross@suse.com, rjw@rjwysocki.net, lenb@kernel.org, viresh.kumar@linaro.org, mchehab@kernel.org, trenn@suse.com, shuah@kernel.org, JBeulich@suse.com, x86@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org Message-ID: <20180723132030.qC0bV2yDgBvnK7tGN0ZWrgTPGIvG0alMgWppn9mQVZY@z> Hygon PMU arch is similar to AMD Family 17h. To support Hygon PMU, the initialization flow for it just call amd_pmu_init() and change PMU name to "HYGON". To share AMD's flow, add code check for Hygon family ID 18h to run the code path of AMD family 17h in core/uncore functions. Signed-off-by: Pu Wen --- arch/x86/events/amd/core.c | 4 ++++ arch/x86/events/amd/uncore.c | 12 +++++++----- arch/x86/events/core.c | 4 ++++ 3 files changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index c84584b..d2b29bf 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -669,6 +669,10 @@ static int __init amd_core_pmu_init(void) * We fallback to using default amd_get_event_constraints. */ break; + case 0x18: + pr_cont("Fam18h "); + /* Fallback to using default amd_get_event_constraints. */ + break; default: pr_err("core perfctr but no constraints; unknown hardware!\n"); return -ENODEV; diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 981ba5e..92ea280 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -507,17 +507,19 @@ static int __init amd_uncore_init(void) { int ret = -ENODEV; - if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) + if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD && + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) return -ENODEV; if (!boot_cpu_has(X86_FEATURE_TOPOEXT)) return -ENODEV; - if (boot_cpu_data.x86 == 0x17) { + if (boot_cpu_data.x86 == 0x17 || boot_cpu_data.x86 == 0x18) { /* - * For F17h, the Northbridge counters are repurposed as Data - * Fabric counters. Also, L3 counters are supported too. The PMUs - * are exported based on family as either L2 or L3 and NB or DF. + * For F17h or F18h, the Northbridge counters are + * repurposed as DataFabric counters. Also, L3 counters + * are supported too. The PMUs are exported based on + * family as either L2 or L3 and NB or DF. */ num_counters_nb = NUM_COUNTERS_NB; num_counters_llc = NUM_COUNTERS_L3; diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 5f4829f..93e026b 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1776,6 +1776,10 @@ static int __init init_hw_perf_events(void) case X86_VENDOR_AMD: err = amd_pmu_init(); break; + case X86_VENDOR_HYGON: + err = amd_pmu_init(); + x86_pmu.name = "HYGON"; + break; default: err = -ENOTSUPP; } -- 2.7.4