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Wed, 13 Nov 2024 15:12:58 +0000 (UTC) Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v5 00/13] Zacas/Zabha support and qspinlocks From: patchwork-bot+linux-riscv@kernel.org Message-Id: <173151077674.1250875.11061543352254749516.git-patchwork-notify@kernel.org> Date: Wed, 13 Nov 2024 15:12:56 +0000 References: <20240818063538.6651-1-alexghiti@rivosinc.com> In-Reply-To: <20240818063538.6651-1-alexghiti@rivosinc.com> To: Alexandre Ghiti Cc: linux-riscv@lists.infradead.org, corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, conor@kernel.org, robh@kernel.org, krzk+dt@kernel.org, parri.andrea@gmail.com, nathan@kernel.org, peterz@infradead.org, mingo@redhat.com, will@kernel.org, longman@redhat.com, boqun.feng@gmail.com, arnd@arndb.de, leobras@redhat.com, guoren@kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Hello: This series was applied to riscv/linux.git (for-next) by Palmer Dabbelt : On Sun, 18 Aug 2024 08:35:25 +0200 you wrote: > This implements [cmp]xchgXX() macros using Zacas and Zabha extensions > and finally uses those newly introduced macros to add support for > qspinlocks: note that this implementation of qspinlocks satisfies the > forward progress guarantee. > > It also uses Ziccrse to provide the qspinlock implementation. > > [...] Here is the summary with links: - [v5,01/13] riscv: Move cpufeature.h macros into their own header https://git.kernel.org/riscv/c/010e12aa4925 - [v5,02/13] riscv: Do not fail to build on byte/halfword operations with Zawrs https://git.kernel.org/riscv/c/af042c457db0 - [v5,03/13] riscv: Implement cmpxchg32/64() using Zacas https://git.kernel.org/riscv/c/38acdee32d23 - [v5,04/13] dt-bindings: riscv: Add Zabha ISA extension description (no matching commit) - [v5,05/13] riscv: Implement cmpxchg8/16() using Zabha (no matching commit) - [v5,06/13] riscv: Improve zacas fully-ordered cmpxchg() (no matching commit) - [v5,07/13] riscv: Implement arch_cmpxchg128() using Zacas https://git.kernel.org/riscv/c/f7bd2be7663c - [v5,08/13] riscv: Implement xchg8/16() using Zabha https://git.kernel.org/riscv/c/97ddab7fbea8 - [v5,09/13] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock https://git.kernel.org/riscv/c/cbe82e140bb7 - [v5,10/13] asm-generic: ticket-lock: Add separate ticket-lock.h https://git.kernel.org/riscv/c/22c33321e260 - [v5,11/13] riscv: Add ISA extension parsing for Ziccrse (no matching commit) - [v5,12/13] dt-bindings: riscv: Add Ziccrse ISA extension description https://git.kernel.org/riscv/c/447b2afbcde1 - [v5,13/13] riscv: Add qspinlock support (no matching commit) You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html