From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yu-cheng Yu Subject: Re: [PATCH v7 03/14] x86/cet/ibt: Add IBT legacy code bitmap setup function Date: Mon, 10 Jun 2019 15:40:49 -0700 Message-ID: <1b961c71d30e31ecb22da2c5401b1a81cb802d86.camel@intel.com> References: <20190606200926.4029-1-yu-cheng.yu@intel.com> <20190606200926.4029-4-yu-cheng.yu@intel.com> <20190607080832.GT3419@hirez.programming.kicks-ass.net> <20190607174336.GM3436@hirez.programming.kicks-ass.net> <34E0D316-552A-401C-ABAA-5584B5BC98C5@amacapital.net> <7e0b97bf1fbe6ff20653a8e4e147c6285cc5552d.camel@intel.com> <25281DB3-FCE4-40C2-BADB-B3B05C5F8DD3@amacapital.net> <3f19582d-78b1-5849-ffd0-53e8ca747c0d@intel.com> <5aa98999b1343f34828414b74261201886ec4591.camel@intel.com> <0665416d-9999-b394-df17-f2a5e1408130@intel.com> <5c8727dde9653402eea97bfdd030c479d1e8dd99.camel@intel.com> <328275c9b43c06809c9937c83d25126a6e3efcbd.camel@intel.com> <92e56b28-0cd4-e3f4-867b-639d9b98b86c@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <92e56b28-0cd4-e3f4-867b-639d9b98b86c@intel.com> Sender: linux-kernel-owner@vger.kernel.org To: Dave Hansen , Andy Lutomirski Cc: Peter Zijlstra , x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit List-Id: linux-arch.vger.kernel.org On Mon, 2019-06-10 at 15:02 -0700, Dave Hansen wrote: > On 6/10/19 1:58 PM, Yu-cheng Yu wrote: > > > > On each memory request, the kernel then must consider a percentage of > > > > allocated space in its calculation, and on systems with less memory > > > > this quickly becomes a problem. > > > > > > I'm not sure what you're referring to here? Are you referring to our > > > overcommit limits? > > > > Yes. > > My assumption has always been that these large, potentially sparse > hardware tables *must* be mmap()'d with MAP_NORESERVE specified. That > should keep them from being problematic with respect to overcommit. Ok, we will go back to do_mmap() with MAP_PRIVATE, MAP_NORESERVE and VM_DONTDUMP. The bitmap will cover only 48-bit address space. We then create PR_MARK_CODE_AS_LEGACY. The kernel will set the bitmap, but it is going to be slow. Perhaps we still let the app fill the bitmap? Yu-cheng From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com ([192.55.52.115]:59984 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390340AbfFJWs5 (ORCPT ); Mon, 10 Jun 2019 18:48:57 -0400 Message-ID: <1b961c71d30e31ecb22da2c5401b1a81cb802d86.camel@intel.com> Subject: Re: [PATCH v7 03/14] x86/cet/ibt: Add IBT legacy code bitmap setup function From: Yu-cheng Yu Date: Mon, 10 Jun 2019 15:40:49 -0700 In-Reply-To: <92e56b28-0cd4-e3f4-867b-639d9b98b86c@intel.com> References: <20190606200926.4029-1-yu-cheng.yu@intel.com> <20190606200926.4029-4-yu-cheng.yu@intel.com> <20190607080832.GT3419@hirez.programming.kicks-ass.net> <20190607174336.GM3436@hirez.programming.kicks-ass.net> <34E0D316-552A-401C-ABAA-5584B5BC98C5@amacapital.net> <7e0b97bf1fbe6ff20653a8e4e147c6285cc5552d.camel@intel.com> <25281DB3-FCE4-40C2-BADB-B3B05C5F8DD3@amacapital.net> <3f19582d-78b1-5849-ffd0-53e8ca747c0d@intel.com> <5aa98999b1343f34828414b74261201886ec4591.camel@intel.com> <0665416d-9999-b394-df17-f2a5e1408130@intel.com> <5c8727dde9653402eea97bfdd030c479d1e8dd99.camel@intel.com> <328275c9b43c06809c9937c83d25126a6e3efcbd.camel@intel.com> <92e56b28-0cd4-e3f4-867b-639d9b98b86c@intel.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-arch-owner@vger.kernel.org List-ID: To: Dave Hansen , Andy Lutomirski Cc: Peter Zijlstra , x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin Message-ID: <20190610224049.tY8RTbS-9nHUWr-ia5_pljuwkgQdOCrQRl2uDqNbbEA@z> On Mon, 2019-06-10 at 15:02 -0700, Dave Hansen wrote: > On 6/10/19 1:58 PM, Yu-cheng Yu wrote: > > > > On each memory request, the kernel then must consider a percentage of > > > > allocated space in its calculation, and on systems with less memory > > > > this quickly becomes a problem. > > > > > > I'm not sure what you're referring to here? Are you referring to our > > > overcommit limits? > > > > Yes. > > My assumption has always been that these large, potentially sparse > hardware tables *must* be mmap()'d with MAP_NORESERVE specified. That > should keep them from being problematic with respect to overcommit. Ok, we will go back to do_mmap() with MAP_PRIVATE, MAP_NORESERVE and VM_DONTDUMP. The bitmap will cover only 48-bit address space. We then create PR_MARK_CODE_AS_LEGACY. The kernel will set the bitmap, but it is going to be slow. Perhaps we still let the app fill the bitmap? Yu-cheng