Re: [PATCH] I/O space write barrier

[Jesse Barnes <jbarnes@engr.sgi.com>]

On Thursday, September 23, 2004 3:03 pm, James Bottomley wrote:
> On Thu, 2004-09-23 at 14:48, Jesse Barnes wrote:
> > - RD_REG_WORD(&reg->ictrl); /* PCI Posted Write flush */
> > + mmiowb(); /* make sure this write arrives before any others */
>
> What's going on here?  In your docs you say this mmiowb() is explicitly
> to prevent write ordering problems and doesn't affect posting.  However
> in this patch you're using it to replace a posting flush read.

Jeremy was the one that added these, I think the comment is misleading and 
only ordering was intended.  If that's not the case I'll drop this bit.

>
> >   ha->flags.ints_enabled = 1;
>
> The result will be that we can get to here, but the write that enables
> the interrupt may still be posted in a bridge somewhere.

If we're waiting for an interrupt here, I don't think it matters if we flush 
or order, we'll wait the same amount of time regardless.

Thanks,
Jesse