From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.polymtl.ca ([132.207.4.11]:48566 "EHLO smtp.polymtl.ca" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755821AbYKLXe3 (ORCPT ); Wed, 12 Nov 2008 18:34:29 -0500 Message-Id: <20081112232258.399129838@polymtl.ca> References: <20081112231551.473569400@polymtl.ca> Date: Wed, 12 Nov 2008 18:15:52 -0500 From: Mathieu Desnoyers Subject: [patch 01/17] get_cycles() : kconfig HAVE_GET_CYCLES Content-Disposition: inline; filename=get-cycles-kconfig-have-get-cycles.patch Sender: linux-arch-owner@vger.kernel.org List-ID: To: Linus Torvalds , akpm@linux-foundation.org, Ingo Molnar , Peter Zijlstra , Steven Rostedt , linux-kernel@vger.kernel.org Cc: Mathieu Desnoyers , David Miller , Ingo Molnar , Thomas Gleixner , linux-arch@vger.kernel.org Create a new "HAVE_GET_CYCLES" architecture option to specify which architectures provide 64-bits TSC counters readable with get_cycles(). It's principally useful to only enable high-precision tracing code only on such architectures and don't even bother building it on architectures which lack such support. It also requires architectures to provide get_cycles_barrier() and get_cycles_rate(). I mainly use it for the "priority-sifting rwlock" latency tracing code, which traces worse-case latency induced by the locking. It also provides the basic changes needed for the LTTng timestamping infrastructure. Signed-off-by: Mathieu Desnoyers CC: David Miller CC: Linus Torvalds CC: Andrew Morton CC: Ingo Molnar CC: Peter Zijlstra CC: Thomas Gleixner CC: Steven Rostedt CC: linux-arch@vger.kernel.org --- init/Kconfig | 10 ++++++++++ 1 file changed, 10 insertions(+) Index: linux.trees.git/init/Kconfig =================================================================== --- linux.trees.git.orig/init/Kconfig 2008-11-07 00:34:11.000000000 -0500 +++ linux.trees.git/init/Kconfig 2008-11-12 17:58:05.000000000 -0500 @@ -330,6 +330,16 @@ config CPUSETS config HAVE_UNSTABLE_SCHED_CLOCK bool +# +# Architectures with a 64-bits get_cycles() should select this. +# They should also define +# get_cycles_barrier() : instruction synchronization barrier if required +# get_cycles_rate() : cycle counter rate, in HZ. If 0, TSC are not synchronized +# across CPUs or their frequency may vary due to frequency scaling. +# +config HAVE_GET_CYCLES + def_bool n + config GROUP_SCHED bool "Group CPU scheduler" depends on EXPERIMENTAL -- Mathieu Desnoyers OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68