From: Will Deacon <will.deacon@arm.com>
To: richard -rw- weinberger <richard.weinberger@gmail.com>
Cc: "Wang, Yalin" <Yalin.Wang@sonymobile.com>,
"linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: A bug about system call on ARM
Date: Wed, 29 May 2013 10:48:27 +0100 [thread overview]
Message-ID: <20130529094826.GD13095@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <CAFLxGvyy=73dGQqG8W6SXZah7WQZ4gJAeeHXN8opKaOuG-5yUQ@mail.gmail.com>
Hello,
On Wed, May 29, 2013 at 09:46:42AM +0100, richard -rw- weinberger wrote:
> On Wed, May 29, 2013 at 10:24 AM, Wang, Yalin <Yalin.Wang@sonymobile.com> wrote:
> > I have download the latest linux kernel code 3.9.4
> > And Compare with 3.4.0 kernel .
> >
> > It seems there is no change for this part ,
> > So it will still happen .
> > Does anyone know who is responsible for arm arch part kernel code ?
>
> See MAINTAINERS file.
> CC'ing linux-arm-kernel@lists.infradead.org
Cheers for adding us to CC.
> >> #ifdef CONFIG_ARM_THUMB
> >> tst r8, #PSR_T_BIT
> >> movne r10, #0 @ no thumb OABI emulation
> >> ldreq r10, [lr, #-4] @ get SWI instruction // crash at this instruction, when get SWI instruction
Do you have the panic log please? Also, which SoC are you using and how are
you reproducing this?
> >> ldr r10, [lr, #-4] @ get SWI instruction
> >> A710( and ip, r10, #0x0f000000 @ check for SWI )
> >> A710( teq ip, #0x0f000000 )
> >> A710( bne .Larm710bug )
> >> #endif
> >> #ifdef CONFIG_CPU_ENDIAN_BE8
> >> rev r10, r10 @ little endian instruction
> >> #endif
> >>
> >> /*********************************************************************
> >> ******************************/
> >>
> >> Then reason why it will crash when get SWI instruction is maybe This
> >> page is clear to aged by kernel, But this MMU fault happpened in
> >> kernel, So the kernel do_page_fault function will not clear this page
> >> to young, So that will crash .
Sounds like we might need some USER annotations around the instruction
loads, but we should also rework the code so that we re-enable interrupts
first.
Will
next prev parent reply other threads:[~2013-05-29 9:48 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-29 6:52 A bug about system call on ARM Wang, Yalin
2013-05-29 7:34 ` richard -rw- weinberger
2013-05-29 7:37 ` Wang, Yalin
2013-05-29 8:24 ` Wang, Yalin
2013-05-29 8:46 ` richard -rw- weinberger
2013-05-29 9:48 ` Will Deacon [this message]
2013-05-29 9:50 ` Wang, Yalin
2013-05-30 1:41 ` Wang, Yalin
2013-05-30 9:09 ` Will Deacon
2013-05-30 11:41 ` Will Deacon
2013-05-30 11:41 ` Will Deacon
2013-05-31 2:56 ` Wang, Yalin
2013-05-31 8:46 ` Will Deacon
2013-05-31 11:02 ` Wang, Yalin
2013-05-31 11:13 ` Will Deacon
2013-05-31 11:30 ` Wang, Yalin
2013-06-03 5:25 ` Wang, Yalin
2013-06-03 9:54 ` Will Deacon
2013-06-03 9:58 ` Wang, Yalin
2013-06-04 5:33 ` Wang, Yalin
2013-06-04 8:48 ` Will Deacon
2013-06-04 8:48 ` Will Deacon
2013-06-04 9:30 ` Wang, Yalin
2013-06-04 11:27 ` Will Deacon
2013-06-14 6:53 ` Wang, Yalin
2013-05-31 16:48 ` Nicolas Pitre
2013-05-31 16:52 ` Will Deacon
2013-05-31 3:54 ` Nicolas Pitre
2013-05-31 3:54 ` Nicolas Pitre
2013-05-31 8:45 ` Will Deacon
2013-06-03 10:18 ` Russell King - ARM Linux
2013-06-03 10:27 ` Will Deacon
2013-06-03 10:45 ` Russell King - ARM Linux
2013-06-03 12:39 ` Will Deacon
2013-05-29 8:54 ` Mikael Pettersson
2013-05-29 8:54 ` Mikael Pettersson
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