From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux Subject: Re: [PATCH] WIP: HACK: LPAE, BOOTMEM and NO_BOOTMEM Date: Sat, 29 Jun 2013 20:55:49 +0100 Message-ID: <20130629195549.GE3353@n2100.arm.linux.org.uk> References: <1372467663-31425-1-git-send-email-santosh.shilimkar@ti.com> <20130629152959.GB31339@mtj.dyndns.org> <20130629172123.GA3353@n2100.arm.linux.org.uk> <20130629175743.GA382@mtj.dyndns.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Yinghai Lu Cc: Nicolas Pitre , linux-arch@vger.kernel.org, Benjamin Herrenschmidt , Catalin Marinas , Will Deacon , Linux Kernel Mailing List , "sparclinux@vger.kernel.org" , Ingo Molnar , Santosh Shilimkar , "H. Peter Anvin" , Tejun Heo , Paul Mackerras , Andrew Morton , Sam Ravnborg , "David S. Miller" , linux-arm-kernel@lists.infradead.org List-Id: linux-arch.vger.kernel.org On Sat, Jun 29, 2013 at 12:29:55PM -0700, Yinghai Lu wrote: > On Sat, Jun 29, 2013 at 10:57 AM, Tejun Heo wrote: > > ( Expanding cc list, original thread is at > > http://thread.gmane.org/gmane.linux.kernel/1518046 ) > > > > Hello, > > > > On Sat, Jun 29, 2013 at 06:21:24PM +0100, Russell King - ARM Linux wrote: > >> Unfortunately, that has not been true on ARM - it's very common for > >> there to be an offset on physical memory, sometimes of the order of > >> 3GB or more. This is because on reset, ARMs start executing the code > >> at physical address zero, which therefore can't be RAM - and there's > >> a desire to avoid complex switching games in hardware to temporarily > >> map ROM there instead of RAM. > >> > >> On these SoCs which Santosh is working on, the main physical memory > >> mapping is above 4GB, with just a small alias below 4GB to allow the > >> system to boot without the MMU being on, as they may have more than > >> 4GB of RAM. As I understand it, the small alias below 4GB is not > >> suitable for use as a "lowmem" mapping. > > is that 32bit ARM or 64bit ARM? Only 32-bit has LPAE. Such things don't make sense on 64-bit CPUs. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from caramon.arm.linux.org.uk ([78.32.30.218]:35090 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752753Ab3F2T5W (ORCPT ); Sat, 29 Jun 2013 15:57:22 -0400 Date: Sat, 29 Jun 2013 20:55:49 +0100 From: Russell King - ARM Linux Subject: Re: [PATCH] WIP: HACK: LPAE, BOOTMEM and NO_BOOTMEM Message-ID: <20130629195549.GE3353@n2100.arm.linux.org.uk> References: <1372467663-31425-1-git-send-email-santosh.shilimkar@ti.com> <20130629152959.GB31339@mtj.dyndns.org> <20130629172123.GA3353@n2100.arm.linux.org.uk> <20130629175743.GA382@mtj.dyndns.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: linux-arch-owner@vger.kernel.org List-ID: To: Yinghai Lu Cc: Tejun Heo , Santosh Shilimkar , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , Catalin Marinas , Will Deacon , Nicolas Pitre , Ingo Molnar , Andrew Morton , "H. Peter Anvin" , Benjamin Herrenschmidt , Paul Mackerras , "David S. Miller" , "sparclinux@vger.kernel.org" , Sam Ravnborg , linux-arch@vger.kernel.org Message-ID: <20130629195549.VLEVykF6TV2WgcUjW4-81gsO4oH5VrUkkjjmm7rBlRE@z> On Sat, Jun 29, 2013 at 12:29:55PM -0700, Yinghai Lu wrote: > On Sat, Jun 29, 2013 at 10:57 AM, Tejun Heo wrote: > > ( Expanding cc list, original thread is at > > http://thread.gmane.org/gmane.linux.kernel/1518046 ) > > > > Hello, > > > > On Sat, Jun 29, 2013 at 06:21:24PM +0100, Russell King - ARM Linux wrote: > >> Unfortunately, that has not been true on ARM - it's very common for > >> there to be an offset on physical memory, sometimes of the order of > >> 3GB or more. This is because on reset, ARMs start executing the code > >> at physical address zero, which therefore can't be RAM - and there's > >> a desire to avoid complex switching games in hardware to temporarily > >> map ROM there instead of RAM. > >> > >> On these SoCs which Santosh is working on, the main physical memory > >> mapping is above 4GB, with just a small alias below 4GB to allow the > >> system to boot without the MMU being on, as they may have more than > >> 4GB of RAM. As I understand it, the small alias below 4GB is not > >> suitable for use as a "lowmem" mapping. > > is that 32bit ARM or 64bit ARM? Only 32-bit has LPAE. Such things don't make sense on 64-bit CPUs.