From: Peter Zijlstra <peterz@infradead.org>
To: David Daney <ddaney@caviumnetworks.com>
Cc: Ralf Baechle <ralf@linux-mips.org>,
linux-arch@vger.kernel.org, linux-mips@linux-mips.org,
linux-kernel@vger.kernel.org,
Paul McKenney <paulmck@linux.vnet.ibm.com>,
Will Deacon <will.deacon@arm.com>,
Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: mips octeon memory model questions
Date: Thu, 6 Feb 2014 12:45:17 +0100 [thread overview]
Message-ID: <20140206114517.GI4941@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <52F144C3.1080705@caviumnetworks.com>
On Tue, Feb 04, 2014 at 11:51:31AM -0800, David Daney wrote:
> On OCTEON, SC implies a SYNC operation for the target memory location. So
> the "SC b" is ordered before any writes that come after the SC.
Ah, that makes it all come together. I was thrown by octeon initially
having WEAK_REORDERING_BEYOND_LLSC set and thus thinking there were no
implied barriers.
Thanks David.
prev parent reply other threads:[~2014-02-06 11:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-04 18:41 mips octeon memory model questions Peter Zijlstra
2014-02-04 18:41 ` Peter Zijlstra
2014-02-04 18:58 ` Linus Torvalds
2014-02-04 19:05 ` Peter Zijlstra
2014-02-04 19:05 ` Peter Zijlstra
2014-02-04 19:16 ` Linus Torvalds
2014-02-04 19:39 ` Peter Zijlstra
2014-02-04 19:51 ` David Daney
2014-02-06 11:45 ` Peter Zijlstra [this message]
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