linux-arch.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Ray Jui <ray.jui@broadcom.com>
Cc: linux-arch@vger.kernel.org, Jon Mason <jonmason@broadcom.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Ray Jui <rjui@broadcom.com>, Bjorn Helgaas <bhelgaas@google.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 13/20] PCI: iproc-platform: update PCI config space remap function
Date: Tue, 28 Feb 2017 10:54:28 +0000	[thread overview]
Message-ID: <20170228105428.GD7439@red-moon> (raw)
In-Reply-To: <84a0b24b-3c88-b750-dd9e-1607bc67a0a8@broadcom.com>

Hi Ray,

On Mon, Feb 27, 2017 at 01:21:39PM -0800, Ray Jui wrote:
> Hi Lorenzo,
> 
> On 2/27/2017 7:14 AM, Lorenzo Pieralisi wrote:
> > PCI configuration space should be mapped with a memory region type that
> > generates on the CPU host bus non-posted write transations. Update the
> > driver to use the devm_pci_remap_cfg* interface to make sure the correct
> > memory mappings for PCI configuration space are used.
> > 
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Ray Jui <rjui@broadcom.com>
> > Cc: Jon Mason <jonmason@broadcom.com>
> > ---
> >  drivers/pci/host/pcie-iproc-platform.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pci/host/pcie-iproc-platform.c b/drivers/pci/host/pcie-iproc-platform.c
> > index f4909bb..b48d0db 100644
> > --- a/drivers/pci/host/pcie-iproc-platform.c
> > +++ b/drivers/pci/host/pcie-iproc-platform.c
> > @@ -67,7 +67,8 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
> >  		return ret;
> >  	}
> >  
> > -	pcie->base = devm_ioremap(dev, reg.start, resource_size(&reg));
> > +	pcie->base = devm_pci_remap_cfgspace(dev, reg.start,
> > +					     resource_size(&reg));
> 
> Note these are NOT config space registers; instead, they are host
> controller registers. iProc PCIe controller access config space
> registers indirectly through two of the controller registers instead of
> directly mapped.

Yes but IIUC those registers that allow indirection live in the address
space pointed at by pcie->base, right ? Question is whether it is fine
to access those registers through mappings resulting on posted writes
and that's a question I need your help to answer as I said in the cover
letter.

Thanks a lot for flagging this up, that's exactly the feedback I need.

Lorenzo

> 
> Thanks,
> 
> Ray
> 
> >  	if (!pcie->base) {
> >  		dev_err(dev, "unable to map controller registers\n");
> >  		return -ENOMEM;
> > 

WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Ray Jui <ray.jui@broadcom.com>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>, Ray Jui <rjui@broadcom.com>,
	Jon Mason <jonmason@broadcom.com>
Subject: Re: [PATCH 13/20] PCI: iproc-platform: update PCI config space remap function
Date: Tue, 28 Feb 2017 10:54:28 +0000	[thread overview]
Message-ID: <20170228105428.GD7439@red-moon> (raw)
Message-ID: <20170228105428.yuMH8f9An4xU2zSbPm5XvsLpi78FKUFdKIdwva7ecIo@z> (raw)
In-Reply-To: <84a0b24b-3c88-b750-dd9e-1607bc67a0a8@broadcom.com>

Hi Ray,

On Mon, Feb 27, 2017 at 01:21:39PM -0800, Ray Jui wrote:
> Hi Lorenzo,
> 
> On 2/27/2017 7:14 AM, Lorenzo Pieralisi wrote:
> > PCI configuration space should be mapped with a memory region type that
> > generates on the CPU host bus non-posted write transations. Update the
> > driver to use the devm_pci_remap_cfg* interface to make sure the correct
> > memory mappings for PCI configuration space are used.
> > 
> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Ray Jui <rjui@broadcom.com>
> > Cc: Jon Mason <jonmason@broadcom.com>
> > ---
> >  drivers/pci/host/pcie-iproc-platform.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pci/host/pcie-iproc-platform.c b/drivers/pci/host/pcie-iproc-platform.c
> > index f4909bb..b48d0db 100644
> > --- a/drivers/pci/host/pcie-iproc-platform.c
> > +++ b/drivers/pci/host/pcie-iproc-platform.c
> > @@ -67,7 +67,8 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
> >  		return ret;
> >  	}
> >  
> > -	pcie->base = devm_ioremap(dev, reg.start, resource_size(&reg));
> > +	pcie->base = devm_pci_remap_cfgspace(dev, reg.start,
> > +					     resource_size(&reg));
> 
> Note these are NOT config space registers; instead, they are host
> controller registers. iProc PCIe controller access config space
> registers indirectly through two of the controller registers instead of
> directly mapped.

Yes but IIUC those registers that allow indirection live in the address
space pointed at by pcie->base, right ? Question is whether it is fine
to access those registers through mappings resulting on posted writes
and that's a question I need your help to answer as I said in the cover
letter.

Thanks a lot for flagging this up, that's exactly the feedback I need.

Lorenzo

> 
> Thanks,
> 
> Ray
> 
> >  	if (!pcie->base) {
> >  		dev_err(dev, "unable to map controller registers\n");
> >  		return -ENOMEM;
> > 

  parent reply	other threads:[~2017-02-28 10:54 UTC|newest]

Thread overview: 109+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-27 15:14 [PATCH 00/20] PCI: fix config and I/O Address space memory mappings Lorenzo Pieralisi
2017-02-27 15:14 ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 01/20] PCI: remove __weak tag from pci_remap_iospace() Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-03-01 16:15   ` Arnd Bergmann
2017-03-01 16:15     ` Arnd Bergmann
2017-02-27 15:14 ` [PATCH 02/20] PCI: fix pci_remap_iospace() remap attribute Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-03-16 21:48   ` Bjorn Helgaas
2017-03-16 21:48     ` Bjorn Helgaas
2017-03-17  0:33     ` Luis R. Rodriguez
2017-03-17  0:33       ` Luis R. Rodriguez
2017-03-17 10:43       ` Liviu Dudau
2017-03-17 10:43         ` Liviu Dudau
2017-03-17 16:26         ` Luis R. Rodriguez
2017-03-17 16:26           ` Luis R. Rodriguez
2017-03-20 16:19           ` Lorenzo Pieralisi
2017-03-20 16:19             ` Lorenzo Pieralisi
2017-03-20 16:06       ` Bjorn Helgaas
2017-03-20 16:06         ` Bjorn Helgaas
2017-03-20 16:26         ` Lorenzo Pieralisi
2017-03-20 16:26           ` Lorenzo Pieralisi
2017-03-20 16:38           ` Bjorn Helgaas
2017-03-20 16:38             ` Bjorn Helgaas
2017-02-27 15:14 ` [PATCH 03/20] asm-generic/io.h: add PCI config space remap interface Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-03-16 21:12   ` Bjorn Helgaas
2017-03-16 21:12     ` Bjorn Helgaas
2017-03-17  0:08     ` Luis R. Rodriguez
2017-03-17  0:08       ` Luis R. Rodriguez
2017-03-20 10:22       ` John Garry
2017-03-20 10:22         ` John Garry
2017-03-20 16:27       ` Bjorn Helgaas
2017-03-20 16:27         ` Bjorn Helgaas
2017-03-20 18:45     ` Lorenzo Pieralisi
2017-03-20 18:45       ` Lorenzo Pieralisi
2017-03-22 15:04     ` Lorenzo Pieralisi
2017-03-22 15:04       ` Lorenzo Pieralisi
2017-03-22 15:15       ` Arnd Bergmann
2017-03-22 15:15         ` Arnd Bergmann
2017-03-22 16:29       ` Bjorn Helgaas
2017-03-22 16:29         ` Bjorn Helgaas
2017-02-27 15:14 ` [PATCH 04/20] ARM64: implement pci_remap_cfgspace() interface Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 05/20] ARM: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-03-20 16:43   ` Russell King - ARM Linux
2017-03-20 16:43     ` Russell King - ARM Linux
2017-03-21 15:26     ` Lorenzo Pieralisi
2017-03-21 15:26       ` Lorenzo Pieralisi
2017-03-21 16:53       ` Russell King - ARM Linux
2017-03-21 16:53         ` Russell King - ARM Linux
2017-02-27 15:14 ` [PATCH 06/20] PCI: ECAM: use pci_remap_cfgspace() to map config region Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 07/20] PCI: implement Devres interface to map PCI config space Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-28 10:43   ` Lorenzo Pieralisi
2017-02-28 10:43     ` Lorenzo Pieralisi
2017-03-01 23:54   ` Andy Shevchenko
2017-03-01 23:54     ` Andy Shevchenko
2017-03-02 12:05     ` Lorenzo Pieralisi
2017-03-02 12:05       ` Lorenzo Pieralisi
2017-03-02 12:50       ` Andy Shevchenko
2017-03-02 12:50         ` Andy Shevchenko
2017-03-02 19:24         ` Tejun Heo
2017-03-02 19:24           ` Tejun Heo
2017-03-02 20:08           ` Thierry Reding
2017-03-02 20:08             ` Thierry Reding
2017-02-27 15:14 ` [PATCH 08/20] PCI: xilinx: update PCI config space remap function Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 09/20] PCI: xilinx-nwl: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 10/20] PCI: spear13xx: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 11/20] PCI: rockchip: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 12/20] PCI: qcom: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 13/20] PCI: iproc-platform: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 21:21   ` Ray Jui
2017-02-27 21:21     ` Ray Jui
2017-02-28 10:54     ` Lorenzo Pieralisi [this message]
2017-02-28 10:54       ` Lorenzo Pieralisi
2017-02-28 17:42       ` Ray Jui
2017-02-28 17:42         ` Ray Jui
2017-02-27 15:14 ` [PATCH 14/20] PCI: hisi: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-03-02 10:56   ` Gabriele Paoloni
2017-03-02 10:56     ` Gabriele Paoloni
2017-03-02 11:49     ` Lorenzo Pieralisi
2017-03-02 11:49       ` Lorenzo Pieralisi
2017-03-02 11:53       ` Gabriele Paoloni
2017-03-02 11:53         ` Gabriele Paoloni
2017-02-27 15:14 ` [PATCH 15/20] PCI: designware: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 16/20] PCI: armada8k: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 17/20] PCI: xgene: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 18/20] PCI: tegra: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 19/20] PCI: layerscape: " Lorenzo Pieralisi
2017-02-27 15:14 ` [PATCH 20/20] PCI: keystone-dw: " Lorenzo Pieralisi
2017-02-27 15:14   ` Lorenzo Pieralisi
2017-03-01 16:18 ` [PATCH 00/20] PCI: fix config and I/O Address space memory mappings Arnd Bergmann
2017-03-01 16:18   ` Arnd Bergmann
2017-03-02 18:00   ` Lorenzo Pieralisi
2017-03-02 18:00     ` Lorenzo Pieralisi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170228105428.GD7439@red-moon \
    --to=lorenzo.pieralisi@arm.com \
    --cc=bhelgaas@google.com \
    --cc=jonmason@broadcom.com \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=ray.jui@broadcom.com \
    --cc=rjui@broadcom.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).