From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@suse.com>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Dmitry Vyukov <dvyukov@google.com>
Subject: [PATCH 19/26] x86/kasan: extend to support 5-level paging
Date: Mon, 13 Mar 2017 08:50:13 +0300 [thread overview]
Message-ID: <20170313055020.69655-20-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20170313055020.69655-1-kirill.shutemov@linux.intel.com>
This patch bring support for non-folded additional page table level.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Dmitry Vyukov <dvyukov@google.com
---
arch/x86/mm/kasan_init_64.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/x86/mm/kasan_init_64.c b/arch/x86/mm/kasan_init_64.c
index 733f8ba6a01f..bcabc56e0dc4 100644
--- a/arch/x86/mm/kasan_init_64.c
+++ b/arch/x86/mm/kasan_init_64.c
@@ -50,8 +50,18 @@ static void __init kasan_map_early_shadow(pgd_t *pgd)
unsigned long end = KASAN_SHADOW_END;
for (i = pgd_index(start); start < end; i++) {
- pgd[i] = __pgd(__pa_nodebug(kasan_zero_pud)
- | _KERNPG_TABLE);
+ switch (CONFIG_PGTABLE_LEVELS) {
+ case 4:
+ pgd[i] = __pgd(__pa_nodebug(kasan_zero_pud) |
+ _KERNPG_TABLE);
+ break;
+ case 5:
+ pgd[i] = __pgd(__pa_nodebug(kasan_zero_p4d) |
+ _KERNPG_TABLE);
+ break;
+ default:
+ BUILD_BUG();
+ }
start += PGDIR_SIZE;
}
}
@@ -79,6 +89,7 @@ void __init kasan_early_init(void)
pteval_t pte_val = __pa_nodebug(kasan_zero_page) | __PAGE_KERNEL;
pmdval_t pmd_val = __pa_nodebug(kasan_zero_pte) | _KERNPG_TABLE;
pudval_t pud_val = __pa_nodebug(kasan_zero_pmd) | _KERNPG_TABLE;
+ p4dval_t p4d_val = __pa_nodebug(kasan_zero_pud) | _KERNPG_TABLE;
for (i = 0; i < PTRS_PER_PTE; i++)
kasan_zero_pte[i] = __pte(pte_val);
@@ -89,6 +100,9 @@ void __init kasan_early_init(void)
for (i = 0; i < PTRS_PER_PUD; i++)
kasan_zero_pud[i] = __pud(pud_val);
+ for (i = 0; CONFIG_PGTABLE_LEVELS >= 5 && i < PTRS_PER_P4D; i++)
+ kasan_zero_p4d[i] = __p4d(p4d_val);
+
kasan_map_early_shadow(early_level4_pgt);
kasan_map_early_shadow(init_level4_pgt);
}
--
2.11.0
--
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WARNING: multiple messages have this Message-ID (diff)
From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@suse.com>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Dmitry Vyukov <dvyukov@google.com>
Subject: [PATCH 19/26] x86/kasan: extend to support 5-level paging
Date: Mon, 13 Mar 2017 08:50:13 +0300 [thread overview]
Message-ID: <20170313055020.69655-20-kirill.shutemov@linux.intel.com> (raw)
Message-ID: <20170313055013.Ix5Z7OpSnw1to4ZyDMgaFTLG89DNSuBVc__TfpWbw9s@z> (raw)
In-Reply-To: <20170313055020.69655-1-kirill.shutemov@linux.intel.com>
This patch bring support for non-folded additional page table level.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Dmitry Vyukov <dvyukov@google.com
---
arch/x86/mm/kasan_init_64.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/x86/mm/kasan_init_64.c b/arch/x86/mm/kasan_init_64.c
index 733f8ba6a01f..bcabc56e0dc4 100644
--- a/arch/x86/mm/kasan_init_64.c
+++ b/arch/x86/mm/kasan_init_64.c
@@ -50,8 +50,18 @@ static void __init kasan_map_early_shadow(pgd_t *pgd)
unsigned long end = KASAN_SHADOW_END;
for (i = pgd_index(start); start < end; i++) {
- pgd[i] = __pgd(__pa_nodebug(kasan_zero_pud)
- | _KERNPG_TABLE);
+ switch (CONFIG_PGTABLE_LEVELS) {
+ case 4:
+ pgd[i] = __pgd(__pa_nodebug(kasan_zero_pud) |
+ _KERNPG_TABLE);
+ break;
+ case 5:
+ pgd[i] = __pgd(__pa_nodebug(kasan_zero_p4d) |
+ _KERNPG_TABLE);
+ break;
+ default:
+ BUILD_BUG();
+ }
start += PGDIR_SIZE;
}
}
@@ -79,6 +89,7 @@ void __init kasan_early_init(void)
pteval_t pte_val = __pa_nodebug(kasan_zero_page) | __PAGE_KERNEL;
pmdval_t pmd_val = __pa_nodebug(kasan_zero_pte) | _KERNPG_TABLE;
pudval_t pud_val = __pa_nodebug(kasan_zero_pmd) | _KERNPG_TABLE;
+ p4dval_t p4d_val = __pa_nodebug(kasan_zero_pud) | _KERNPG_TABLE;
for (i = 0; i < PTRS_PER_PTE; i++)
kasan_zero_pte[i] = __pte(pte_val);
@@ -89,6 +100,9 @@ void __init kasan_early_init(void)
for (i = 0; i < PTRS_PER_PUD; i++)
kasan_zero_pud[i] = __pud(pud_val);
+ for (i = 0; CONFIG_PGTABLE_LEVELS >= 5 && i < PTRS_PER_P4D; i++)
+ kasan_zero_p4d[i] = __p4d(p4d_val);
+
kasan_map_early_shadow(early_level4_pgt);
kasan_map_early_shadow(init_level4_pgt);
}
--
2.11.0
next prev parent reply other threads:[~2017-03-13 5:50 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-13 5:49 [PATCH 00/26] x86: 5-level paging enabling for v4.12 Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 01/26] x86: basic changes into headers for 5-level paging Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 02/26] x86: trivial portion of 5-level paging conversion Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 03/26] x86/gup: add 5-level paging support Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 04/26] x86/ident_map: " Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 05/26] x86/mm: add support of p4d_t in vmalloc_fault() Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 06/26] x86/power: support p4d_t in hibernate code Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 07/26] x86/kexec: support p4d_t Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 08/26] x86/efi: handle p4d in EFI pagetables Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 09/26] x86/mm/pat: handle additional page table Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 10/26] x86/kasan: prepare clear_pgds() to switch to <asm-generic/pgtable-nop4d.h> Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 11/26] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 12/26] x86: convert the rest of the code to support p4d_t Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 13/26] x86: detect 5-level paging support Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 14/26] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 15/26] x86/mm: define virtual memory map for 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 16/26] x86/paravirt: make paravirt code support " Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 17/26] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 18/26] x86/dump_pagetables: support 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov [this message]
2017-03-13 5:50 ` [PATCH 19/26] x86/kasan: extend to " Kirill A. Shutemov
2017-03-13 7:25 ` Dmitry Vyukov
2017-03-13 5:50 ` [PATCH 20/26] x86/espfix: " Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 21/26] x86/mm: add support of additional page table level during early boot Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 7:18 ` Ingo Molnar
2017-04-05 11:36 ` Kirill A. Shutemov
2017-04-05 11:36 ` Kirill A. Shutemov
2017-04-05 15:32 ` Kirill A. Shutemov
2017-04-05 15:32 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 22/26] x86/mm: add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 7:22 ` Ingo Molnar
2017-03-13 5:50 ` [PATCH 23/26] x86/mm: make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 24/26] x86/mm: add support for 5-level paging for KASLR Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 25/26] x86: enable 5-level paging support Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 26/26] x86/mm: allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-17 17:53 ` Aneesh Kumar K.V
2017-03-17 17:53 ` Aneesh Kumar K.V
2017-03-17 17:57 ` Kirill A. Shutemov
2017-03-17 17:57 ` Kirill A. Shutemov
2017-03-19 8:24 ` Aneesh Kumar K.V
2017-03-19 8:24 ` Aneesh Kumar K.V
2017-03-19 8:26 ` Kirill A. Shutemov
2017-03-20 18:08 ` hpa
2017-03-20 18:08 ` hpa
2017-03-20 18:38 ` Matthew Wilcox
2017-03-20 18:38 ` Matthew Wilcox
2017-03-24 8:59 ` Kirill A. Shutemov
2017-03-19 8:55 ` Aneesh Kumar K.V
2017-03-19 8:55 ` Aneesh Kumar K.V
2017-03-24 9:03 ` Kirill A. Shutemov
2017-03-20 9:15 ` Michael Ellerman
2017-03-20 9:15 ` Michael Ellerman
2017-03-20 5:10 ` Aneesh Kumar K.V
2017-03-20 5:10 ` Aneesh Kumar K.V
2017-03-24 9:04 ` Kirill A. Shutemov
2017-03-24 9:14 ` Aneesh Kumar K.V
2017-03-24 9:30 ` Kirill A. Shutemov
2017-03-13 7:49 ` [PATCH 00/26] x86: 5-level paging enabling for v4.12 Ingo Molnar
2017-03-13 7:49 ` Ingo Molnar
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