From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> To: Linus Torvalds <torvalds@linux-foundation.org>, Andrew Morton <akpm@linux-foundation.org>, x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com> Cc: Andi Kleen <ak@linux.intel.com>, Dave Hansen <dave.hansen@intel.com>, Andy Lutomirski <luto@amacapital.net>, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Subject: [PATCH 1/8] x86/boot: Detect 5-level paging support Date: Mon, 27 Mar 2017 19:29:18 +0300 [thread overview] Message-ID: <20170327162925.16092-2-kirill.shutemov@linux.intel.com> (raw) In-Reply-To: <20170327162925.16092-1-kirill.shutemov@linux.intel.com> 5-level paging support is required from hardware when compiled with CONFIG_X86_5LEVEL=y. We will implement boot-time switch between 4- and 5-level paging later. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> --- arch/x86/boot/cpucheck.c | 9 +++++++++ arch/x86/boot/cpuflags.c | 12 ++++++++++-- arch/x86/include/asm/disabled-features.h | 8 +++++++- arch/x86/include/asm/required-features.h | 8 +++++++- 4 files changed, 33 insertions(+), 4 deletions(-) diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 4ad7d70e8739..8f0c4c9fc904 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -44,6 +44,15 @@ static const u32 req_flags[NCAPINTS] = 0, /* REQUIRED_MASK5 not implemented in this file */ REQUIRED_MASK6, 0, /* REQUIRED_MASK7 not implemented in this file */ + 0, /* REQUIRED_MASK8 not implemented in this file */ + 0, /* REQUIRED_MASK9 not implemented in this file */ + 0, /* REQUIRED_MASK10 not implemented in this file */ + 0, /* REQUIRED_MASK11 not implemented in this file */ + 0, /* REQUIRED_MASK12 not implemented in this file */ + 0, /* REQUIRED_MASK13 not implemented in this file */ + 0, /* REQUIRED_MASK14 not implemented in this file */ + 0, /* REQUIRED_MASK15 not implemented in this file */ + REQUIRED_MASK16, }; #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) diff --git a/arch/x86/boot/cpuflags.c b/arch/x86/boot/cpuflags.c index 6687ab953257..9e77c23c2422 100644 --- a/arch/x86/boot/cpuflags.c +++ b/arch/x86/boot/cpuflags.c @@ -70,16 +70,19 @@ int has_eflag(unsigned long mask) # define EBX_REG "=b" #endif -static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d) +static inline void cpuid_count(u32 id, u32 count, + u32 *a, u32 *b, u32 *c, u32 *d) { asm volatile(".ifnc %%ebx,%3 ; movl %%ebx,%3 ; .endif \n\t" "cpuid \n\t" ".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif \n\t" : "=a" (*a), "=c" (*c), "=d" (*d), EBX_REG (*b) - : "a" (id) + : "a" (id), "c" (count) ); } +#define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d) + void get_cpuflags(void) { u32 max_intel_level, max_amd_level; @@ -108,6 +111,11 @@ void get_cpuflags(void) cpu.model += ((tfms >> 16) & 0xf) << 4; } + if (max_intel_level >= 0x00000007) { + cpuid_count(0x00000007, 0, &ignored, &ignored, + &cpu.flags[16], &ignored); + } + cpuid(0x80000000, &max_amd_level, &ignored, &ignored, &ignored); diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h index 85599ad4d024..fc0960236fc3 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -36,6 +36,12 @@ # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ +#ifdef CONFIG_X86_5LEVEL +#define DISABLE_LA57 0 +#else +#define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31)) +#endif + /* * Make sure to add features to the correct mask */ @@ -55,7 +61,7 @@ #define DISABLED_MASK13 0 #define DISABLED_MASK14 0 #define DISABLED_MASK15 0 -#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE) +#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57) #define DISABLED_MASK17 0 #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18) diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h index fac9a5c0abe9..d91ba04dd007 100644 --- a/arch/x86/include/asm/required-features.h +++ b/arch/x86/include/asm/required-features.h @@ -53,6 +53,12 @@ # define NEED_MOVBE 0 #endif +#ifdef CONFIG_X86_5LEVEL +# define NEED_LA57 (1<<(X86_FEATURE_LA57 & 31)) +#else +# define NEED_LA57 0 +#endif + #ifdef CONFIG_X86_64 #ifdef CONFIG_PARAVIRT /* Paravirtualized systems may not have PSE or PGE available */ @@ -98,7 +104,7 @@ #define REQUIRED_MASK13 0 #define REQUIRED_MASK14 0 #define REQUIRED_MASK15 0 -#define REQUIRED_MASK16 0 +#define REQUIRED_MASK16 (NEED_LA57) #define REQUIRED_MASK17 0 #define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18) -- 2.11.0 -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a>
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From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> To: Linus Torvalds <torvalds@linux-foundation.org>, Andrew Morton <akpm@linux-foundation.org>, x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com> Cc: Andi Kleen <ak@linux.intel.com>, Dave Hansen <dave.hansen@intel.com>, Andy Lutomirski <luto@amacapital.net>, linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Subject: [PATCH 1/8] x86/boot: Detect 5-level paging support Date: Mon, 27 Mar 2017 19:29:18 +0300 [thread overview] Message-ID: <20170327162925.16092-2-kirill.shutemov@linux.intel.com> (raw) Message-ID: <20170327162918.xyc_ImCH5eYqn94urDYCkPNtslwl6cL-qYsWq3RIwEE@z> (raw) In-Reply-To: <20170327162925.16092-1-kirill.shutemov@linux.intel.com> 5-level paging support is required from hardware when compiled with CONFIG_X86_5LEVEL=y. We will implement boot-time switch between 4- and 5-level paging later. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> --- arch/x86/boot/cpucheck.c | 9 +++++++++ arch/x86/boot/cpuflags.c | 12 ++++++++++-- arch/x86/include/asm/disabled-features.h | 8 +++++++- arch/x86/include/asm/required-features.h | 8 +++++++- 4 files changed, 33 insertions(+), 4 deletions(-) diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c index 4ad7d70e8739..8f0c4c9fc904 100644 --- a/arch/x86/boot/cpucheck.c +++ b/arch/x86/boot/cpucheck.c @@ -44,6 +44,15 @@ static const u32 req_flags[NCAPINTS] = 0, /* REQUIRED_MASK5 not implemented in this file */ REQUIRED_MASK6, 0, /* REQUIRED_MASK7 not implemented in this file */ + 0, /* REQUIRED_MASK8 not implemented in this file */ + 0, /* REQUIRED_MASK9 not implemented in this file */ + 0, /* REQUIRED_MASK10 not implemented in this file */ + 0, /* REQUIRED_MASK11 not implemented in this file */ + 0, /* REQUIRED_MASK12 not implemented in this file */ + 0, /* REQUIRED_MASK13 not implemented in this file */ + 0, /* REQUIRED_MASK14 not implemented in this file */ + 0, /* REQUIRED_MASK15 not implemented in this file */ + REQUIRED_MASK16, }; #define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) diff --git a/arch/x86/boot/cpuflags.c b/arch/x86/boot/cpuflags.c index 6687ab953257..9e77c23c2422 100644 --- a/arch/x86/boot/cpuflags.c +++ b/arch/x86/boot/cpuflags.c @@ -70,16 +70,19 @@ int has_eflag(unsigned long mask) # define EBX_REG "=b" #endif -static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d) +static inline void cpuid_count(u32 id, u32 count, + u32 *a, u32 *b, u32 *c, u32 *d) { asm volatile(".ifnc %%ebx,%3 ; movl %%ebx,%3 ; .endif \n\t" "cpuid \n\t" ".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif \n\t" : "=a" (*a), "=c" (*c), "=d" (*d), EBX_REG (*b) - : "a" (id) + : "a" (id), "c" (count) ); } +#define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d) + void get_cpuflags(void) { u32 max_intel_level, max_amd_level; @@ -108,6 +111,11 @@ void get_cpuflags(void) cpu.model += ((tfms >> 16) & 0xf) << 4; } + if (max_intel_level >= 0x00000007) { + cpuid_count(0x00000007, 0, &ignored, &ignored, + &cpu.flags[16], &ignored); + } + cpuid(0x80000000, &max_amd_level, &ignored, &ignored, &ignored); diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h index 85599ad4d024..fc0960236fc3 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -36,6 +36,12 @@ # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ +#ifdef CONFIG_X86_5LEVEL +#define DISABLE_LA57 0 +#else +#define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31)) +#endif + /* * Make sure to add features to the correct mask */ @@ -55,7 +61,7 @@ #define DISABLED_MASK13 0 #define DISABLED_MASK14 0 #define DISABLED_MASK15 0 -#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE) +#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57) #define DISABLED_MASK17 0 #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18) diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h index fac9a5c0abe9..d91ba04dd007 100644 --- a/arch/x86/include/asm/required-features.h +++ b/arch/x86/include/asm/required-features.h @@ -53,6 +53,12 @@ # define NEED_MOVBE 0 #endif +#ifdef CONFIG_X86_5LEVEL +# define NEED_LA57 (1<<(X86_FEATURE_LA57 & 31)) +#else +# define NEED_LA57 0 +#endif + #ifdef CONFIG_X86_64 #ifdef CONFIG_PARAVIRT /* Paravirtualized systems may not have PSE or PGE available */ @@ -98,7 +104,7 @@ #define REQUIRED_MASK13 0 #define REQUIRED_MASK14 0 #define REQUIRED_MASK15 0 -#define REQUIRED_MASK16 0 +#define REQUIRED_MASK16 (NEED_LA57) #define REQUIRED_MASK17 0 #define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18) -- 2.11.0
next prev parent reply other threads:[~2017-03-27 16:29 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-03-27 16:29 [PATCH 0/8] x86: 5-level paging enabling for v4.12, Part 3 Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov [this message] 2017-03-27 16:29 ` [PATCH 1/8] x86/boot: Detect 5-level paging support Kirill A. Shutemov 2017-03-28 6:06 ` Ingo Molnar 2017-03-28 6:06 ` Ingo Molnar 2017-03-28 10:45 ` [PATCHv2 " Kirill A. Shutemov 2017-03-28 10:45 ` Kirill A. Shutemov 2017-03-27 16:29 ` [PATCH 2/8] x86/asm: Remove __VIRTUAL_MASK_SHIFT==47 assert Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-27 16:29 ` [PATCH 3/8] x86/mm: Define virtual memory map for 5-level paging Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-28 22:21 ` H. Peter Anvin 2017-03-28 22:21 ` H. Peter Anvin 2017-03-28 22:47 ` Kirill A. Shutemov 2017-03-28 22:47 ` Kirill A. Shutemov 2017-03-29 13:20 ` [PATCHv2 " Kirill A. Shutemov 2017-03-27 16:29 ` [PATCH 4/8] x86/paravirt: Make paravirt code support " Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-27 16:29 ` [PATCH 5/8] x86/mm: Add basic defines/helpers for CONFIG_X86_5LEVEL Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-28 6:11 ` Ingo Molnar 2017-03-28 6:11 ` Ingo Molnar 2017-03-28 10:46 ` [PATCHv2 " Kirill A. Shutemov 2017-03-28 10:46 ` Kirill A. Shutemov 2017-03-27 16:29 ` [PATCH 6/8] x86/dump_pagetables: Add support 5-level paging Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-28 6:12 ` Ingo Molnar 2017-03-28 6:12 ` Ingo Molnar 2017-03-28 9:30 ` Kirill A. Shutemov 2017-03-28 9:30 ` Kirill A. Shutemov 2017-03-28 9:39 ` Ingo Molnar 2017-03-28 9:39 ` Ingo Molnar 2017-03-28 10:48 ` [PATCHv2 " Kirill A. Shutemov 2017-03-28 10:48 ` Kirill A. Shutemov 2017-03-28 18:55 ` Borislav Petkov 2017-03-28 21:15 ` Kirill A. Shutemov 2017-03-28 21:15 ` Kirill A. Shutemov 2017-03-28 21:38 ` Borislav Petkov 2017-03-29 15:00 ` Kirill A. Shutemov 2017-03-30 6:22 ` Ingo Molnar 2017-03-30 6:22 ` Ingo Molnar 2017-03-27 16:29 ` [PATCH 7/8] x86/kasan: Extend to " Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-27 16:29 ` [PATCH 8/8] x86/espfix: Add " Kirill A. Shutemov 2017-03-27 16:29 ` Kirill A. Shutemov 2017-03-29 13:22 ` [PATCHv2 " Kirill A. Shutemov 2017-03-29 13:22 ` Kirill A. Shutemov
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