From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: Ingo Molnar <mingo@kernel.org>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
"H. Peter Anvin" <hpa@zytor.com>, Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@suse.com>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 21/26] x86/mm: add support of additional page table level during early boot
Date: Wed, 5 Apr 2017 18:32:00 +0300 [thread overview]
Message-ID: <20170405153200.t7r7c7lyycxm2wzg@node.shutemov.name> (raw)
In-Reply-To: <20170405113624.y5iqjvpwbvayo2cd@node.shutemov.name>
On Wed, Apr 05, 2017 at 02:36:24PM +0300, Kirill A. Shutemov wrote:
> On Mon, Mar 13, 2017 at 08:18:10AM +0100, Ingo Molnar wrote:
> >
> > * Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> >
> > > This patch adds support for 5-level paging during early boot.
> > > It generalizes boot for 4- and 5-level paging on 64-bit systems with
> > > compile-time switch between them.
> > >
> > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > > ---
> > > arch/x86/boot/compressed/head_64.S | 23 +++++++++--
> > > arch/x86/include/asm/pgtable.h | 2 +-
> > > arch/x86/include/asm/pgtable_64.h | 6 ++-
> > > arch/x86/include/uapi/asm/processor-flags.h | 2 +
> > > arch/x86/kernel/espfix_64.c | 2 +-
> > > arch/x86/kernel/head64.c | 40 +++++++++++++-----
> > > arch/x86/kernel/head_64.S | 63 +++++++++++++++++++++--------
> >
> > Ok, here I'd like to have a C version instead of further complicating an already
> > complex assembly version...
>
> Just head up: I work on this.
>
> It's great deal of frustration (I can't really read assembly), but I'm
> slowly moving forward.
>
> Most of logic in startup_64 in arch/x86/kernel/head_64.S is converted
> to C. Dealing with secondary_startup_64 now.
I'm stuck with secondary_startup_64 too. Stack breaks as soon as we switch
to new page tables when onlining secondary CPUs. I don't know how to get
around this.
Would it be sufficient if I only convert startup_64 in
arch/x86/kernel/head_64.S to C?
--
Kirill A. Shutemov
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WARNING: multiple messages have this Message-ID (diff)
From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: Ingo Molnar <mingo@kernel.org>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Arnd Bergmann <arnd@arndb.de>,
"H. Peter Anvin" <hpa@zytor.com>, Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@suse.com>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 21/26] x86/mm: add support of additional page table level during early boot
Date: Wed, 5 Apr 2017 18:32:00 +0300 [thread overview]
Message-ID: <20170405153200.t7r7c7lyycxm2wzg@node.shutemov.name> (raw)
Message-ID: <20170405153200.HfeHMJRd7Y9qSeTmmZIKw_eOfvAUn2qZ3_W5IwzIJLg@z> (raw)
In-Reply-To: <20170405113624.y5iqjvpwbvayo2cd@node.shutemov.name>
On Wed, Apr 05, 2017 at 02:36:24PM +0300, Kirill A. Shutemov wrote:
> On Mon, Mar 13, 2017 at 08:18:10AM +0100, Ingo Molnar wrote:
> >
> > * Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> >
> > > This patch adds support for 5-level paging during early boot.
> > > It generalizes boot for 4- and 5-level paging on 64-bit systems with
> > > compile-time switch between them.
> > >
> > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > > ---
> > > arch/x86/boot/compressed/head_64.S | 23 +++++++++--
> > > arch/x86/include/asm/pgtable.h | 2 +-
> > > arch/x86/include/asm/pgtable_64.h | 6 ++-
> > > arch/x86/include/uapi/asm/processor-flags.h | 2 +
> > > arch/x86/kernel/espfix_64.c | 2 +-
> > > arch/x86/kernel/head64.c | 40 +++++++++++++-----
> > > arch/x86/kernel/head_64.S | 63 +++++++++++++++++++++--------
> >
> > Ok, here I'd like to have a C version instead of further complicating an already
> > complex assembly version...
>
> Just head up: I work on this.
>
> It's great deal of frustration (I can't really read assembly), but I'm
> slowly moving forward.
>
> Most of logic in startup_64 in arch/x86/kernel/head_64.S is converted
> to C. Dealing with secondary_startup_64 now.
I'm stuck with secondary_startup_64 too. Stack breaks as soon as we switch
to new page tables when onlining secondary CPUs. I don't know how to get
around this.
Would it be sufficient if I only convert startup_64 in
arch/x86/kernel/head_64.S to C?
--
Kirill A. Shutemov
next prev parent reply other threads:[~2017-04-05 15:32 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-13 5:49 [PATCH 00/26] x86: 5-level paging enabling for v4.12 Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 01/26] x86: basic changes into headers for 5-level paging Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 02/26] x86: trivial portion of 5-level paging conversion Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 03/26] x86/gup: add 5-level paging support Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 04/26] x86/ident_map: " Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:49 ` [PATCH 05/26] x86/mm: add support of p4d_t in vmalloc_fault() Kirill A. Shutemov
2017-03-13 5:49 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 06/26] x86/power: support p4d_t in hibernate code Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 07/26] x86/kexec: support p4d_t Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 08/26] x86/efi: handle p4d in EFI pagetables Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 09/26] x86/mm/pat: handle additional page table Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 10/26] x86/kasan: prepare clear_pgds() to switch to <asm-generic/pgtable-nop4d.h> Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 11/26] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 12/26] x86: convert the rest of the code to support p4d_t Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 13/26] x86: detect 5-level paging support Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 14/26] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 15/26] x86/mm: define virtual memory map for 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 16/26] x86/paravirt: make paravirt code support " Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 17/26] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 18/26] x86/dump_pagetables: support 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 19/26] x86/kasan: extend to " Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 7:25 ` Dmitry Vyukov
2017-03-13 5:50 ` [PATCH 20/26] x86/espfix: " Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 21/26] x86/mm: add support of additional page table level during early boot Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 7:18 ` Ingo Molnar
2017-04-05 11:36 ` Kirill A. Shutemov
2017-04-05 11:36 ` Kirill A. Shutemov
2017-04-05 15:32 ` Kirill A. Shutemov [this message]
2017-04-05 15:32 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 22/26] x86/mm: add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 7:22 ` Ingo Molnar
2017-03-13 5:50 ` [PATCH 23/26] x86/mm: make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 24/26] x86/mm: add support for 5-level paging for KASLR Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 25/26] x86: enable 5-level paging support Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-13 5:50 ` [PATCH 26/26] x86/mm: allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-03-13 5:50 ` Kirill A. Shutemov
2017-03-17 17:53 ` Aneesh Kumar K.V
2017-03-17 17:53 ` Aneesh Kumar K.V
2017-03-17 17:57 ` Kirill A. Shutemov
2017-03-17 17:57 ` Kirill A. Shutemov
2017-03-19 8:24 ` Aneesh Kumar K.V
2017-03-19 8:24 ` Aneesh Kumar K.V
2017-03-19 8:26 ` Kirill A. Shutemov
2017-03-20 18:08 ` hpa
2017-03-20 18:08 ` hpa
2017-03-20 18:38 ` Matthew Wilcox
2017-03-20 18:38 ` Matthew Wilcox
2017-03-24 8:59 ` Kirill A. Shutemov
2017-03-19 8:55 ` Aneesh Kumar K.V
2017-03-19 8:55 ` Aneesh Kumar K.V
2017-03-24 9:03 ` Kirill A. Shutemov
2017-03-20 9:15 ` Michael Ellerman
2017-03-20 9:15 ` Michael Ellerman
2017-03-20 5:10 ` Aneesh Kumar K.V
2017-03-20 5:10 ` Aneesh Kumar K.V
2017-03-24 9:04 ` Kirill A. Shutemov
2017-03-24 9:14 ` Aneesh Kumar K.V
2017-03-24 9:30 ` Kirill A. Shutemov
2017-03-13 7:49 ` [PATCH 00/26] x86: 5-level paging enabling for v4.12 Ingo Molnar
2017-03-13 7:49 ` Ingo Molnar
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