From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: Juergen Gross <jgross@suse.com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 7/8] x86: Enable 5-level paging support
Date: Thu, 6 Apr 2017 18:24:38 +0300 [thread overview]
Message-ID: <20170406152438.ekpu34qe2wzevf4h@node.shutemov.name> (raw)
In-Reply-To: <469e1232-617c-daaa-90a6-a90d6f80059f@suse.com>
On Thu, Apr 06, 2017 at 04:52:11PM +0200, Juergen Gross wrote:
> On 06/04/17 16:01, Kirill A. Shutemov wrote:
> > Most of things are in place and we can enable support of 5-level paging.
> >
> > Enabling XEN with 5-level paging requires more work. The patch makes XEN
> > dependent on !X86_5LEVEL.
> >
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > ---
> > arch/x86/Kconfig | 5 +++++
> > arch/x86/xen/Kconfig | 1 +
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > index 4e153e93273f..7a76dcac357e 100644
> > --- a/arch/x86/Kconfig
> > +++ b/arch/x86/Kconfig
> > @@ -318,6 +318,7 @@ config FIX_EARLYCON_MEM
> >
> > config PGTABLE_LEVELS
> > int
> > + default 5 if X86_5LEVEL
> > default 4 if X86_64
> > default 3 if X86_PAE
> > default 2
> > @@ -1390,6 +1391,10 @@ config X86_PAE
> > has the cost of more pagetable lookup overhead, and also
> > consumes more pagetable space per process.
> >
> > +config X86_5LEVEL
> > + bool "Enable 5-level page tables support"
> > + depends on X86_64
> > +
> > config ARCH_PHYS_ADDR_T_64BIT
> > def_bool y
> > depends on X86_64 || X86_PAE
> > diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
> > index 76b6dbd627df..b90d481ce5a1 100644
> > --- a/arch/x86/xen/Kconfig
> > +++ b/arch/x86/xen/Kconfig
> > @@ -5,6 +5,7 @@
> > config XEN
> > bool "Xen guest support"
> > depends on PARAVIRT
> > + depends on !X86_5LEVEL
> > select PARAVIRT_CLOCK
> > select XEN_HAVE_PVMMU
> > select XEN_HAVE_VPMU
> >
>
> Just a heads up: this last change will conflict with the Xen tree.
It should be trivial to fix, right? It's one-liner after all.
> Can't we just ignore the additional level in Xen pv mode and run with
> 4 levels instead?
We don't have yet boot-time switching between paging modes yet. It will
come later. So the answer is no.
--
Kirill A. Shutemov
next prev parent reply other threads:[~2017-04-06 15:24 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-06 14:00 [PATCH 0/8] x86: 5-level paging enabling for v4.12, Part 4 Kirill A. Shutemov
2017-04-06 14:00 ` Kirill A. Shutemov
2017-04-06 14:00 ` [PATCH 1/8] x86/boot/64: Rewrite startup_64 in C Kirill A. Shutemov
2017-04-06 14:00 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 2/8] x86/boot/64: Rename init_level4_pgt and early_level4_pgt Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 3/8] x86/boot/64: Add support of additional page table level during early boot Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-11 7:02 ` Ingo Molnar
2017-04-11 7:02 ` Ingo Molnar
2017-04-11 10:51 ` Kirill A. Shutemov
2017-04-11 10:51 ` Kirill A. Shutemov
2017-04-11 11:28 ` Ingo Molnar
2017-04-11 11:28 ` Ingo Molnar
2017-04-11 11:46 ` Kirill A. Shutemov
2017-04-11 11:46 ` Kirill A. Shutemov
2017-04-11 14:09 ` Andi Kleen
2017-04-12 10:18 ` Kirill A. Shutemov
2017-04-17 10:32 ` Ingo Molnar
2017-04-17 10:32 ` Ingo Molnar
2017-04-18 8:59 ` Kirill A. Shutemov
2017-04-18 8:59 ` Kirill A. Shutemov
2017-04-18 10:15 ` Kirill A. Shutemov
2017-04-18 11:10 ` Kirill A. Shutemov
2017-04-18 11:10 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 4/8] x86/mm: Add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 5/8] x86/mm: Make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 6/8] x86/mm: Add support for 5-level paging for KASLR Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 7/8] x86: Enable 5-level paging support Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:52 ` Juergen Gross
2017-04-06 15:24 ` Kirill A. Shutemov [this message]
2017-04-06 15:56 ` Juergen Gross
2017-04-06 14:01 ` [PATCH 8/8] x86/mm: Allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 18:43 ` Dmitry Safonov
2017-04-06 19:15 ` Dmitry Safonov
2017-04-06 23:21 ` Kirill A. Shutemov
2017-04-06 23:24 ` [PATCHv2 " Kirill A. Shutemov
2017-04-06 23:24 ` Kirill A. Shutemov
2017-04-07 11:32 ` Dmitry Safonov
2017-04-07 15:44 ` [PATCHv3 " Kirill A. Shutemov
2017-04-07 16:37 ` Dmitry Safonov
2017-04-13 11:30 ` [PATCHv4 0/9] x86: 5-level paging enabling for v4.12, Part 4 Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 1/9] x86/asm: Fix comment in return_from_SYSCALL_64 Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 2/9] x86/boot/64: Rewrite startup_64 in C Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 3/9] x86/boot/64: Rename init_level4_pgt and early_level4_pgt Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 4/9] x86/boot/64: Add support of additional page table level during early boot Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 5/9] x86/mm: Add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 6/9] x86/mm: Make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 7/9] x86/mm: Add support for 5-level paging for KASLR Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 8/9] x86: Enable 5-level paging support Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 9/9] x86/mm: Allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-07 10:06 ` [PATCH 8/8] " Dmitry Safonov
2017-04-07 13:35 ` Anshuman Khandual
2017-04-07 13:35 ` Anshuman Khandual
2017-04-07 15:59 ` Kirill A. Shutemov
2017-04-07 15:59 ` Kirill A. Shutemov
2017-04-07 16:09 ` hpa
2017-04-07 16:09 ` hpa
2017-04-07 16:20 ` Kirill A. Shutemov
2017-04-12 10:41 ` Michael Ellerman
2017-04-12 11:11 ` Kirill A. Shutemov
2017-04-12 11:11 ` Kirill A. Shutemov
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