From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/8] x86/boot/64: Add support of additional page table level during early boot
Date: Tue, 11 Apr 2017 13:28:45 +0200 [thread overview]
Message-ID: <20170411112845.GA15212@gmail.com> (raw)
In-Reply-To: <20170411105106.4zgbzuu4s4267zyv@node.shutemov.name>
* Kirill A. Shutemov <kirill@shutemov.name> wrote:
> On Tue, Apr 11, 2017 at 09:02:03AM +0200, Ingo Molnar wrote:
> > I realize that you had difficulties converting this to C, but it's not going to
> > get any easier in the future either, with one more paging mode/level added!
> >
> > If you are stuck on where it breaks I'd suggest doing it gradually: first add a
> > trivial .c, build and link it in and call it separately. Then once that works,
> > move functionality from asm to C step by step and test it at every step.
>
> I've described the specific issue with converting this code to C in cover
> letter: how to make compiler to generate 32-bit code for a specific
> function or translation unit, without breaking linking afterwards (-m32
> break it).
Have you tried putting it into a separate .c file, and building it 32-bit?
I think arch/x86/entry/vdso/Makefile contains an example of how to build 32-bit
code even on 64-bit kernels.
Thanks,
Ingo
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WARNING: multiple messages have this Message-ID (diff)
From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/8] x86/boot/64: Add support of additional page table level during early boot
Date: Tue, 11 Apr 2017 13:28:45 +0200 [thread overview]
Message-ID: <20170411112845.GA15212@gmail.com> (raw)
Message-ID: <20170411112845.Q2Hb4HNNik0Fm8rz9nUx6Zord8w3nW90b1COVxJC_qI@z> (raw)
In-Reply-To: <20170411105106.4zgbzuu4s4267zyv@node.shutemov.name>
* Kirill A. Shutemov <kirill@shutemov.name> wrote:
> On Tue, Apr 11, 2017 at 09:02:03AM +0200, Ingo Molnar wrote:
> > I realize that you had difficulties converting this to C, but it's not going to
> > get any easier in the future either, with one more paging mode/level added!
> >
> > If you are stuck on where it breaks I'd suggest doing it gradually: first add a
> > trivial .c, build and link it in and call it separately. Then once that works,
> > move functionality from asm to C step by step and test it at every step.
>
> I've described the specific issue with converting this code to C in cover
> letter: how to make compiler to generate 32-bit code for a specific
> function or translation unit, without breaking linking afterwards (-m32
> break it).
Have you tried putting it into a separate .c file, and building it 32-bit?
I think arch/x86/entry/vdso/Makefile contains an example of how to build 32-bit
code even on 64-bit kernels.
Thanks,
Ingo
next prev parent reply other threads:[~2017-04-11 11:28 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-06 14:00 [PATCH 0/8] x86: 5-level paging enabling for v4.12, Part 4 Kirill A. Shutemov
2017-04-06 14:00 ` Kirill A. Shutemov
2017-04-06 14:00 ` [PATCH 1/8] x86/boot/64: Rewrite startup_64 in C Kirill A. Shutemov
2017-04-06 14:00 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 2/8] x86/boot/64: Rename init_level4_pgt and early_level4_pgt Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 3/8] x86/boot/64: Add support of additional page table level during early boot Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-11 7:02 ` Ingo Molnar
2017-04-11 7:02 ` Ingo Molnar
2017-04-11 10:51 ` Kirill A. Shutemov
2017-04-11 10:51 ` Kirill A. Shutemov
2017-04-11 11:28 ` Ingo Molnar [this message]
2017-04-11 11:28 ` Ingo Molnar
2017-04-11 11:46 ` Kirill A. Shutemov
2017-04-11 11:46 ` Kirill A. Shutemov
2017-04-11 14:09 ` Andi Kleen
2017-04-12 10:18 ` Kirill A. Shutemov
2017-04-17 10:32 ` Ingo Molnar
2017-04-17 10:32 ` Ingo Molnar
2017-04-18 8:59 ` Kirill A. Shutemov
2017-04-18 8:59 ` Kirill A. Shutemov
2017-04-18 10:15 ` Kirill A. Shutemov
2017-04-18 11:10 ` Kirill A. Shutemov
2017-04-18 11:10 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 4/8] x86/mm: Add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 5/8] x86/mm: Make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 6/8] x86/mm: Add support for 5-level paging for KASLR Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:01 ` [PATCH 7/8] x86: Enable 5-level paging support Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 14:52 ` Juergen Gross
2017-04-06 15:24 ` Kirill A. Shutemov
2017-04-06 15:56 ` Juergen Gross
2017-04-06 14:01 ` [PATCH 8/8] x86/mm: Allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-04-06 14:01 ` Kirill A. Shutemov
2017-04-06 18:43 ` Dmitry Safonov
2017-04-06 19:15 ` Dmitry Safonov
2017-04-06 23:21 ` Kirill A. Shutemov
2017-04-06 23:24 ` [PATCHv2 " Kirill A. Shutemov
2017-04-06 23:24 ` Kirill A. Shutemov
2017-04-07 11:32 ` Dmitry Safonov
2017-04-07 15:44 ` [PATCHv3 " Kirill A. Shutemov
2017-04-07 16:37 ` Dmitry Safonov
2017-04-13 11:30 ` [PATCHv4 0/9] x86: 5-level paging enabling for v4.12, Part 4 Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 1/9] x86/asm: Fix comment in return_from_SYSCALL_64 Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 2/9] x86/boot/64: Rewrite startup_64 in C Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 3/9] x86/boot/64: Rename init_level4_pgt and early_level4_pgt Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 4/9] x86/boot/64: Add support of additional page table level during early boot Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 5/9] x86/mm: Add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 6/9] x86/mm: Make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 7/9] x86/mm: Add support for 5-level paging for KASLR Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 8/9] x86: Enable 5-level paging support Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-13 11:30 ` [PATCHv4 9/9] x86/mm: Allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-04-13 11:30 ` Kirill A. Shutemov
2017-04-07 10:06 ` [PATCH 8/8] " Dmitry Safonov
2017-04-07 13:35 ` Anshuman Khandual
2017-04-07 13:35 ` Anshuman Khandual
2017-04-07 15:59 ` Kirill A. Shutemov
2017-04-07 15:59 ` Kirill A. Shutemov
2017-04-07 16:09 ` hpa
2017-04-07 16:09 ` hpa
2017-04-07 16:20 ` Kirill A. Shutemov
2017-04-12 10:41 ` Michael Ellerman
2017-04-12 11:11 ` Kirill A. Shutemov
2017-04-12 11:11 ` Kirill A. Shutemov
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