From: Dave Martin <Dave.Martin@arm.com>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: linux-arch@vger.kernel.org, libc-alpha@sourceware.org,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
gdb@sourceware.org, Yao Qi <Yao.Qi@arm.com>,
Alan Hayward <alan.hayward@arm.com>,
Will Deacon <will.deacon@arm.com>,
Richard Sandiford <richard.sandiford@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 09/27] arm64/sve: Signal frame and context structure definition
Date: Tue, 22 Aug 2017 15:21:36 +0100 [thread overview]
Message-ID: <20170822142135.GU6321@e103592.cambridge.arm.com> (raw)
In-Reply-To: <87tw0z4sk2.fsf@linaro.org>
On Tue, Aug 22, 2017 at 02:53:49PM +0100, Alex Bennée wrote:
>
> Dave Martin <Dave.Martin@arm.com> writes:
>
> > On Tue, Aug 22, 2017 at 11:22:44AM +0100, Alex Bennée wrote:
> >>
> >> Dave Martin <Dave.Martin@arm.com> writes:
[...]
> >> > +/*
> >> > + * The SVE architecture leaves space for future expansion of the
> >> > + * vector length beyond its initial architectural limit of 2048 bits
> >> > + * (16 quadwords).
> >> > + */
> >> > +#define SVE_VQ_MIN 1
> >> > +#define SVE_VQ_MAX 0x200
> >> > +
> >> > +#define SVE_VL_MIN (SVE_VQ_MIN * 0x10)
> >> > +#define SVE_VL_MAX (SVE_VQ_MAX * 0x10)
> >> > +
> >> > +#define SVE_NUM_ZREGS 32
> >> > +#define SVE_NUM_PREGS 16
> >> > +
> >> > +#define sve_vl_valid(vl) \
> >> > + ((vl) % 0x10 == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
> >> > +#define sve_vq_from_vl(vl) ((vl) / 0x10)
> >> > +#define sve_vl_from_vq(vq) ((vq) * 0x10)
> >>
> >> I got a little confused first time through over what VQ and VL where.
> >> Maybe it would make sense to expand a little more from first principles?
> >>
> >> /*
> >> * The SVE architecture defines vector registers as a multiple of 128
> >> * bit quadwords. The current architectural limit is 2048 bits (16
> >> * quadwords) but there is room for future expansion beyond that.
> >> */
> >
> > This comes up in several places and so I didn't want to comment it
> > repeatedly everywhere.
> >
> > Instead, I wrote up something in section 2 (Vector length terminology)
> > of Documentation/arm64/sve.txt -- see patch 25. Can you take a look and
> > see whether that's adequate?
>
> Ahh, I hadn't got to that yet. I'm unsure to the order the kernel likes
> to put things but I like to put design documents at the front of the
I don't have a strong opinion on that -- I had preferred not to add a
document describing stuff that doesn't exist at the time of commit.
I could commit a stub document at the start of the series, and then
commit the real document later.
Either way, it seemed overkill.
Perhaps I should have drawn more attention to the documentation in the
cover letter, and encouraged reviewers to look at it first. My
experience is that people don't often read cover letters...
Now the series is posted, I'm minded to keep the order as-is, unless you
think it's a big issue.
Adding a reference to the document seems a reasonable thing to do,
so I could add that.
> patch queue as they are useful primers and saves you having to patch a:
>
> modified arch/arm64/include/uapi/asm/sigcontext.h
> @@ -132,19 +132,24 @@ struct sve_context {
> /*
> * The SVE architecture leaves space for future expansion of the
> * vector length beyond its initial architectural limit of 2048 bits
> - * (16 quadwords).
> + * (16 quadwords). See Documentation/arm64/sve.txt for a summary of
> + * the terminology of Vector Quads (VQ) and Vector Lengths (VL).
> */
> +
> +#define SVE_VQ_BITS 128 /* 128 bits in one quadword */
> +#define SVE_VQ_BYTES (SVE_VQ_BITS / 8)
> +
I was trying to keep extraneous #defines to a minimum, since this is a
uapi header, and people may depend on anything defined here.
I think SVE_VQ_BYTES is reasonable to have, and this allows us to
rewrite a few hard-coded 0x10s and 16s symbolically which is probably a
good idea -- I'll add this.
SVE_VQ_BITS looks redundant to me though. It wouldn't be used for any
purpose other than defining SVE_VQ_BYTES.
> #define SVE_VQ_MIN 1
> #define SVE_VQ_MAX 0x200
>
> -#define SVE_VL_MIN (SVE_VQ_MIN * 0x10)
> -#define SVE_VL_MAX (SVE_VQ_MAX * 0x10)
> +#define SVE_VL_MIN (SVE_VQ_MIN * SVE_VQ_BYTES)
> +#define SVE_VL_MAX (SVE_VQ_MAX * SVE_VQ_BYTES)
>
> #define SVE_NUM_ZREGS 32
> #define SVE_NUM_PREGS 16
>
> #define sve_vl_valid(vl) \
> - ((vl) % 0x10 == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
> + ((vl) % SVE_VQ_BYTES == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
> #define sve_vq_from_vl(vl) ((vl) / 0x10)
> #define sve_vl_from_vq(vq) ((vq) * 0x10)
[...]
Cheers
---Dave
WARNING: multiple messages have this Message-ID (diff)
From: Dave Martin <Dave.Martin@arm.com>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: linux-arch@vger.kernel.org, libc-alpha@sourceware.org,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
gdb@sourceware.org, Yao Qi <Yao.Qi@arm.com>,
Will Deacon <will.deacon@arm.com>,
Richard Sandiford <richard.sandiford@arm.com>,
Alan Hayward <alan.hayward@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 09/27] arm64/sve: Signal frame and context structure definition
Date: Tue, 22 Aug 2017 15:21:36 +0100 [thread overview]
Message-ID: <20170822142135.GU6321@e103592.cambridge.arm.com> (raw)
Message-ID: <20170822142136.7LA6Xf0LrU4hS15x7MJjyZHkCRhWrF7UVB60XXABUtY@z> (raw)
In-Reply-To: <87tw0z4sk2.fsf@linaro.org>
On Tue, Aug 22, 2017 at 02:53:49PM +0100, Alex Bennée wrote:
>
> Dave Martin <Dave.Martin@arm.com> writes:
>
> > On Tue, Aug 22, 2017 at 11:22:44AM +0100, Alex Bennée wrote:
> >>
> >> Dave Martin <Dave.Martin@arm.com> writes:
[...]
> >> > +/*
> >> > + * The SVE architecture leaves space for future expansion of the
> >> > + * vector length beyond its initial architectural limit of 2048 bits
> >> > + * (16 quadwords).
> >> > + */
> >> > +#define SVE_VQ_MIN 1
> >> > +#define SVE_VQ_MAX 0x200
> >> > +
> >> > +#define SVE_VL_MIN (SVE_VQ_MIN * 0x10)
> >> > +#define SVE_VL_MAX (SVE_VQ_MAX * 0x10)
> >> > +
> >> > +#define SVE_NUM_ZREGS 32
> >> > +#define SVE_NUM_PREGS 16
> >> > +
> >> > +#define sve_vl_valid(vl) \
> >> > + ((vl) % 0x10 == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
> >> > +#define sve_vq_from_vl(vl) ((vl) / 0x10)
> >> > +#define sve_vl_from_vq(vq) ((vq) * 0x10)
> >>
> >> I got a little confused first time through over what VQ and VL where.
> >> Maybe it would make sense to expand a little more from first principles?
> >>
> >> /*
> >> * The SVE architecture defines vector registers as a multiple of 128
> >> * bit quadwords. The current architectural limit is 2048 bits (16
> >> * quadwords) but there is room for future expansion beyond that.
> >> */
> >
> > This comes up in several places and so I didn't want to comment it
> > repeatedly everywhere.
> >
> > Instead, I wrote up something in section 2 (Vector length terminology)
> > of Documentation/arm64/sve.txt -- see patch 25. Can you take a look and
> > see whether that's adequate?
>
> Ahh, I hadn't got to that yet. I'm unsure to the order the kernel likes
> to put things but I like to put design documents at the front of the
I don't have a strong opinion on that -- I had preferred not to add a
document describing stuff that doesn't exist at the time of commit.
I could commit a stub document at the start of the series, and then
commit the real document later.
Either way, it seemed overkill.
Perhaps I should have drawn more attention to the documentation in the
cover letter, and encouraged reviewers to look at it first. My
experience is that people don't often read cover letters...
Now the series is posted, I'm minded to keep the order as-is, unless you
think it's a big issue.
Adding a reference to the document seems a reasonable thing to do,
so I could add that.
> patch queue as they are useful primers and saves you having to patch a:
>
> modified arch/arm64/include/uapi/asm/sigcontext.h
> @@ -132,19 +132,24 @@ struct sve_context {
> /*
> * The SVE architecture leaves space for future expansion of the
> * vector length beyond its initial architectural limit of 2048 bits
> - * (16 quadwords).
> + * (16 quadwords). See Documentation/arm64/sve.txt for a summary of
> + * the terminology of Vector Quads (VQ) and Vector Lengths (VL).
> */
> +
> +#define SVE_VQ_BITS 128 /* 128 bits in one quadword */
> +#define SVE_VQ_BYTES (SVE_VQ_BITS / 8)
> +
I was trying to keep extraneous #defines to a minimum, since this is a
uapi header, and people may depend on anything defined here.
I think SVE_VQ_BYTES is reasonable to have, and this allows us to
rewrite a few hard-coded 0x10s and 16s symbolically which is probably a
good idea -- I'll add this.
SVE_VQ_BITS looks redundant to me though. It wouldn't be used for any
purpose other than defining SVE_VQ_BYTES.
> #define SVE_VQ_MIN 1
> #define SVE_VQ_MAX 0x200
>
> -#define SVE_VL_MIN (SVE_VQ_MIN * 0x10)
> -#define SVE_VL_MAX (SVE_VQ_MAX * 0x10)
> +#define SVE_VL_MIN (SVE_VQ_MIN * SVE_VQ_BYTES)
> +#define SVE_VL_MAX (SVE_VQ_MAX * SVE_VQ_BYTES)
>
> #define SVE_NUM_ZREGS 32
> #define SVE_NUM_PREGS 16
>
> #define sve_vl_valid(vl) \
> - ((vl) % 0x10 == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
> + ((vl) % SVE_VQ_BYTES == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
> #define sve_vq_from_vl(vl) ((vl) / 0x10)
> #define sve_vl_from_vq(vq) ((vq) * 0x10)
[...]
Cheers
---Dave
next prev parent reply other threads:[~2017-08-22 14:21 UTC|newest]
Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-09 12:05 [PATCH 00/27] ARM Scalable Vector Extension (SVE) Dave Martin
2017-08-09 12:05 ` [PATCH 01/27] regset: Add support for dynamically sized regsets Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-18 11:52 ` Alex Bennée
2017-08-18 11:52 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 02/27] arm64: KVM: Hide unsupported AArch64 CPU features from guests Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-16 11:10 ` Marc Zyngier
2017-08-16 20:32 ` Dave Martin
2017-08-17 8:45 ` Marc Zyngier
2017-08-17 9:57 ` Dave Martin
2017-08-17 9:57 ` Dave Martin
2017-08-09 12:05 ` [PATCH 03/27] arm64: efi: Add missing Kconfig dependency on KERNEL_MODE_NEON Dave Martin
2017-08-18 12:02 ` Alex Bennée
2017-08-18 12:02 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 04/27] arm64: Port deprecated instruction emulation to new sysctl interface Dave Martin
2017-08-18 12:09 ` Alex Bennée
2017-08-18 12:09 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 05/27] arm64: fpsimd: Simplify uses of {set,clear}_ti_thread_flag() Dave Martin
2017-08-15 17:11 ` Ard Biesheuvel
2017-08-18 16:36 ` [PATCH 05/27] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag() Alex Bennée
2017-08-18 16:36 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 06/27] arm64/sve: System register and exception syndrome definitions Dave Martin
2017-08-21 9:33 ` Alex Bennée
2017-08-21 9:33 ` Alex Bennée
2017-08-21 12:34 ` Alex Bennée
2017-08-21 12:34 ` Alex Bennée
2017-08-21 14:26 ` Dave Martin
2017-08-21 14:50 ` Alex Bennée
2017-08-21 14:50 ` Alex Bennée
2017-08-21 15:19 ` Dave Martin
2017-08-21 15:34 ` Alex Bennée
2017-08-21 15:34 ` Alex Bennée
2017-08-21 13:56 ` Dave Martin
2017-08-21 13:56 ` Dave Martin
2017-08-21 14:36 ` Alex Bennée
2017-08-21 14:36 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 07/27] arm64/sve: Low-level SVE architectural state manipulation functions Dave Martin
2017-08-21 10:11 ` Alex Bennée
2017-08-21 10:11 ` Alex Bennée
2017-08-21 14:38 ` Dave Martin
2017-08-21 14:38 ` Dave Martin
2017-08-09 12:05 ` [PATCH 08/27] arm64/sve: Kconfig update and conditional compilation support Dave Martin
2017-08-21 10:12 ` Alex Bennée
2017-08-21 10:12 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 09/27] arm64/sve: Signal frame and context structure definition Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-22 10:22 ` Alex Bennée
2017-08-22 10:22 ` Alex Bennée
2017-08-22 11:17 ` Dave Martin
2017-08-22 13:53 ` Alex Bennée
2017-08-22 13:53 ` Alex Bennée
2017-08-22 14:21 ` Dave Martin [this message]
2017-08-22 14:21 ` Dave Martin
2017-08-22 15:03 ` Alex Bennée
2017-08-22 15:03 ` Alex Bennée
2017-08-22 15:41 ` Dave Martin
2017-08-09 12:05 ` [PATCH 10/27] arm64/sve: Low-level CPU setup Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-22 15:04 ` Alex Bennée
2017-08-22 15:04 ` Alex Bennée
2017-08-22 15:33 ` Dave Martin
2017-08-09 12:05 ` [PATCH 11/27] arm64/sve: Core task context handling Dave Martin
2017-08-15 17:31 ` Ard Biesheuvel
2017-08-16 10:40 ` Dave Martin
2017-08-17 16:42 ` Dave Martin
2017-08-17 16:46 ` Ard Biesheuvel
2017-08-22 16:21 ` Alex Bennée
2017-08-22 16:21 ` Alex Bennée
2017-08-22 17:19 ` Dave Martin
2017-08-22 18:39 ` Alex Bennée
2017-08-22 18:39 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 12/27] arm64/sve: Support vector length resetting for new processes Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-22 16:22 ` Alex Bennée
2017-08-22 16:22 ` Alex Bennée
2017-08-22 17:22 ` Dave Martin
2017-08-22 17:22 ` Dave Martin
2017-08-09 12:05 ` [PATCH 13/27] arm64/sve: Signal handling support Dave Martin
2017-08-23 9:38 ` Alex Bennée
2017-08-23 9:38 ` Alex Bennée
2017-08-23 11:30 ` Dave Martin
2017-08-09 12:05 ` [PATCH 14/27] arm64/sve: Backend logic for setting the vector length Dave Martin
2017-08-23 15:33 ` Alex Bennée
2017-08-23 15:33 ` Alex Bennée
2017-08-23 17:29 ` Dave Martin
2017-08-09 12:05 ` [PATCH 15/27] arm64/sve: Probe SVE capabilities and usable vector lengths Dave Martin
2017-08-16 17:48 ` Suzuki K Poulose
2017-08-17 10:04 ` Dave Martin
2017-08-17 10:04 ` Dave Martin
2017-08-17 10:46 ` Suzuki K Poulose
2017-08-17 10:46 ` Suzuki K Poulose
2017-08-09 12:05 ` [PATCH 16/27] arm64/sve: Preserve SVE registers around kernel-mode NEON use Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-15 17:37 ` Ard Biesheuvel
2017-08-15 17:37 ` Ard Biesheuvel
2017-08-09 12:05 ` [PATCH 17/27] arm64/sve: Preserve SVE registers around EFI runtime service calls Dave Martin
2017-08-15 17:44 ` Ard Biesheuvel
2017-08-16 9:13 ` Dave Martin
2017-08-09 12:05 ` [PATCH 18/27] arm64/sve: ptrace and ELF coredump support Dave Martin
2017-08-09 12:05 ` [PATCH 19/27] arm64/sve: Add prctl controls for userspace vector length management Dave Martin
2017-08-09 12:05 ` [PATCH 20/27] arm64/sve: Add sysctl to set the default vector length for new processes Dave Martin
2017-08-09 12:05 ` [PATCH 21/27] arm64/sve: KVM: Prevent guests from using SVE Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-15 16:33 ` Marc Zyngier
2017-08-15 16:33 ` Marc Zyngier
2017-08-16 10:50 ` Dave Martin
2017-08-16 11:20 ` Marc Zyngier
2017-08-16 11:22 ` Marc Zyngier
2017-08-16 11:35 ` Dave Martin
2017-08-09 12:05 ` [PATCH 22/27] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution Dave Martin
2017-08-09 12:05 ` Dave Martin
2017-08-09 12:05 ` [PATCH 23/27] arm64/sve: KVM: Hide SVE from CPU features exposed to guests Dave Martin
2017-08-15 16:37 ` Marc Zyngier
2017-08-16 10:54 ` Dave Martin
2017-08-16 11:10 ` Marc Zyngier
2017-08-16 11:22 ` Dave Martin
2017-08-09 12:05 ` [PATCH 24/27] arm64/sve: Detect SVE and activate runtime support Dave Martin
2017-08-16 17:53 ` Suzuki K Poulose
2017-08-17 10:00 ` Dave Martin
2017-08-17 10:00 ` Dave Martin
2017-08-09 12:05 ` [PATCH 25/27] arm64/sve: Add documentation Dave Martin
2017-08-09 12:05 ` [RFC PATCH 26/27] arm64: signal: Report signal frame size to userspace via auxv Dave Martin
2017-08-09 12:05 ` [RFC PATCH 27/27] arm64/sve: signal: Include SVE when computing AT_MINSIGSTKSZ Dave Martin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170822142135.GU6321@e103592.cambridge.arm.com \
--to=dave.martin@arm.com \
--cc=Yao.Qi@arm.com \
--cc=alan.hayward@arm.com \
--cc=alex.bennee@linaro.org \
--cc=ard.biesheuvel@linaro.org \
--cc=catalin.marinas@arm.com \
--cc=gdb@sourceware.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=libc-alpha@sourceware.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=richard.sandiford@arm.com \
--cc=szabolcs.nagy@arm.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).