From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alan Cox Subject: Re: [RFC PATCH] asm/generic: introduce if_nospec and nospec_barrier Date: Thu, 4 Jan 2018 23:21:10 +0000 Message-ID: <20180104232110.4a18b7b1@alans-desktop> References: <20180103223827.39601-1-mark.rutland@arm.com> <151502463248.33513.5960736946233335087.stgit@dwillia2-desk3.amr.corp.intel.com> <20180104010754.22ca6a74@alans-desktop> <20180104192648.GA10427@amd> <20180104224455.GA22369@amd> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-path: Received: from www.llwyncelyn.cymru ([82.70.14.225]:48046 "EHLO fuzix.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751029AbeADXVi (ORCPT ); Thu, 4 Jan 2018 18:21:38 -0500 In-Reply-To: Sender: linux-arch-owner@vger.kernel.org List-ID: To: Dan Williams Cc: Pavel Machek , Julia Lawall , Linus Torvalds , Linux Kernel Mailing List , Mark Rutland , linux-arch@vger.kernel.org, Peter Zijlstra , Greg KH , Thomas Gleixner , Elena Reshetova , Alan Cox , Dan Carpenter > Right, but how far away from "val = array[attacker_controlled_index];" > in the instruction stream do you need to look before you're > comfortable there's no 'val' dependent reads in the speculation window > on all possible architectures. Until we have variable annotations and > compiler help my guess is that static analysis has an easier time > pointing us to the first potentially bad speculative access. On x86 the researchers are saying up to 180 or so simple instructions. I've not seen any Intel or AMD official quoted value. It's enough that you need to peer across functions. Alan