From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Zijlstra Subject: Re: [PATCH V2 11/19] csky: Atomic operations Date: Thu, 5 Jul 2018 19:59:02 +0200 Message-ID: <20180705175902.GF2530@hirez.programming.kicks-ass.net> References: <860b8db036b33d7b3648cb1f4ec827a53dc1a01b.1530465326.git.ren_guo@c-sky.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <860b8db036b33d7b3648cb1f4ec827a53dc1a01b.1530465326.git.ren_guo@c-sky.com> Sender: linux-kernel-owner@vger.kernel.org To: Guo Ren Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, daniel.lezcano@linaro.org, jason@lakedaemon.net, arnd@arndb.de, c-sky_gcc_upstream@c-sky.com, gnu-csky@mentor.com, thomas.petazzoni@bootlin.com, wbx@uclibc-ng.org, green.hu@gmail.com List-Id: linux-arch.vger.kernel.org On Mon, Jul 02, 2018 at 01:30:14AM +0800, Guo Ren wrote: > +static inline void arch_spin_lock(arch_spinlock_t *lock) > +{ > + unsigned int *p = &lock->lock; > + unsigned int tmp; > + > + asm volatile ( > + "1: ldex.w %0, (%1) \n" > + " bnez %0, 1b \n" > + " movi %0, 1 \n" > + " stex.w %0, (%1) \n" > + " bez %0, 1b \n" > + : "=&r" (tmp) > + : "r"(p) > + : "memory"); > + smp_mb(); > +} Test-and-set with MB acting as ACQUIRE, ok. > +static inline void arch_spin_unlock(arch_spinlock_t *lock) > +{ > + unsigned int *p = &lock->lock; > + unsigned int tmp; > + > + smp_mb(); > + asm volatile ( > + "1: ldex.w %0, (%1) \n" > + " movi %0, 0 \n" > + " stex.w %0, (%1) \n" > + " bez %0, 1b \n" > + : "=&r" (tmp) > + : "r"(p) > + : "memory"); > +} MB acting for RELEASE, but _why_ are you using a LDEX/STEX to clear the lock word? Would not a normal store work? Also, the fact that you need MB for release implies your LDEX does not in fact imply anything and your xchg/cmpxchg implementation is broken. > +static inline int arch_spin_trylock(arch_spinlock_t *lock) > +{ > + unsigned int *p = &lock->lock; > + unsigned int tmp; > + > + asm volatile ( > + "1: ldex.w %0, (%1) \n" > + " bnez %0, 2f \n" > + " movi %0, 1 \n" > + " stex.w %0, (%1) \n" > + " bez %0, 1b \n" > + " movi %0, 0 \n" > + "2: \n" > + : "=&r" (tmp) > + : "r"(p) > + : "memory"); > + smp_mb(); > + > + return !tmp; > +} Strictly speaking you can avoid the MB on failure. You only need to provide ACQUIRE semantics on success. That said, I would really suggest you implement a ticket lock instead of a test-and-set lock. They're not really all that complicated and do provide better worst case behaviour. > +/****** read lock/unlock/trylock ******/ Please have a look at using qrwlock -- esp. if you implement a ticket lock, then the rwlock comes for 'free'. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from bombadil.infradead.org ([198.137.202.133]:36166 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753661AbeGER7J (ORCPT ); Thu, 5 Jul 2018 13:59:09 -0400 Date: Thu, 5 Jul 2018 19:59:02 +0200 From: Peter Zijlstra Subject: Re: [PATCH V2 11/19] csky: Atomic operations Message-ID: <20180705175902.GF2530@hirez.programming.kicks-ass.net> References: <860b8db036b33d7b3648cb1f4ec827a53dc1a01b.1530465326.git.ren_guo@c-sky.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <860b8db036b33d7b3648cb1f4ec827a53dc1a01b.1530465326.git.ren_guo@c-sky.com> Sender: linux-arch-owner@vger.kernel.org List-ID: To: Guo Ren Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, daniel.lezcano@linaro.org, jason@lakedaemon.net, arnd@arndb.de, c-sky_gcc_upstream@c-sky.com, gnu-csky@mentor.com, thomas.petazzoni@bootlin.com, wbx@uclibc-ng.org, green.hu@gmail.com Message-ID: <20180705175902.XUhWeh3zamzVasSEZ8yh1sZt8HStlb79K8BkArurtzU@z> On Mon, Jul 02, 2018 at 01:30:14AM +0800, Guo Ren wrote: > +static inline void arch_spin_lock(arch_spinlock_t *lock) > +{ > + unsigned int *p = &lock->lock; > + unsigned int tmp; > + > + asm volatile ( > + "1: ldex.w %0, (%1) \n" > + " bnez %0, 1b \n" > + " movi %0, 1 \n" > + " stex.w %0, (%1) \n" > + " bez %0, 1b \n" > + : "=&r" (tmp) > + : "r"(p) > + : "memory"); > + smp_mb(); > +} Test-and-set with MB acting as ACQUIRE, ok. > +static inline void arch_spin_unlock(arch_spinlock_t *lock) > +{ > + unsigned int *p = &lock->lock; > + unsigned int tmp; > + > + smp_mb(); > + asm volatile ( > + "1: ldex.w %0, (%1) \n" > + " movi %0, 0 \n" > + " stex.w %0, (%1) \n" > + " bez %0, 1b \n" > + : "=&r" (tmp) > + : "r"(p) > + : "memory"); > +} MB acting for RELEASE, but _why_ are you using a LDEX/STEX to clear the lock word? Would not a normal store work? Also, the fact that you need MB for release implies your LDEX does not in fact imply anything and your xchg/cmpxchg implementation is broken. > +static inline int arch_spin_trylock(arch_spinlock_t *lock) > +{ > + unsigned int *p = &lock->lock; > + unsigned int tmp; > + > + asm volatile ( > + "1: ldex.w %0, (%1) \n" > + " bnez %0, 2f \n" > + " movi %0, 1 \n" > + " stex.w %0, (%1) \n" > + " bez %0, 1b \n" > + " movi %0, 0 \n" > + "2: \n" > + : "=&r" (tmp) > + : "r"(p) > + : "memory"); > + smp_mb(); > + > + return !tmp; > +} Strictly speaking you can avoid the MB on failure. You only need to provide ACQUIRE semantics on success. That said, I would really suggest you implement a ticket lock instead of a test-and-set lock. They're not really all that complicated and do provide better worst case behaviour. > +/****** read lock/unlock/trylock ******/ Please have a look at using qrwlock -- esp. if you implement a ticket lock, then the rwlock comes for 'free'.