From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Zijlstra Subject: Re: [PATCH] ARC: ARCv2: jump label: implement jump label patching Date: Thu, 20 Jun 2019 09:15:14 +0200 Message-ID: <20190620071514.GR3419@hirez.programming.kicks-ass.net> References: <20190614164049.31626-1-Eugeniy.Paltsev@synopsys.com> <20190619081227.GL3419@hirez.programming.kicks-ass.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+gla-linux-snps-arc=m.gmane.org@lists.infradead.org To: Vineet Gupta Cc: "linux-arch@vger.kernel.org" , Ard Biesheuvel , Alexey Brodkin , "linux-kernel@vger.kernel.org" , Jason Baron , Paolo Bonzini , "linux-snps-arc@lists.infradead.org" , Eugeniy Paltsev List-Id: linux-arch.vger.kernel.org On Wed, Jun 19, 2019 at 11:55:41PM +0000, Vineet Gupta wrote: > FWIW I tried to avoid all of this by using the 2 byte NOP_S and B_S variants which > ensures we can never straddle cache line so the alignment issue goes away. There's > a nice code size reduction too - see [1] . But I get build link errors in > networking code around DO_ONCE where the unlikely code is too much and offset > can't be encoded in signed 10 bits which B_S is allowed. Yeah, so on x86 we have a 2 byte and a 5 byte relative jump and have the exact same issue. We're currently using 5 byte jumps unconditionally for the same reason. Getting it to use the 2 byte one where possible is a 'fun' project for someone with spare time at some point. It might need a GCC plugin to pull off, I've not put too much tought into it. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from merlin.infradead.org ([205.233.59.134]:39460 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725872AbfFTHPX (ORCPT ); Thu, 20 Jun 2019 03:15:23 -0400 Date: Thu, 20 Jun 2019 09:15:14 +0200 From: Peter Zijlstra Subject: Re: [PATCH] ARC: ARCv2: jump label: implement jump label patching Message-ID: <20190620071514.GR3419@hirez.programming.kicks-ass.net> References: <20190614164049.31626-1-Eugeniy.Paltsev@synopsys.com> <20190619081227.GL3419@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: linux-arch-owner@vger.kernel.org List-ID: To: Vineet Gupta Cc: Eugeniy Paltsev , "linux-snps-arc@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Alexey Brodkin , Jason Baron , Paolo Bonzini , Ard Biesheuvel , "linux-arch@vger.kernel.org" Message-ID: <20190620071514.88Yqf7kE06Uo4t3r2R4oCH9HXhyP8X6jNK6fbwI_r2E@z> On Wed, Jun 19, 2019 at 11:55:41PM +0000, Vineet Gupta wrote: > FWIW I tried to avoid all of this by using the 2 byte NOP_S and B_S variants which > ensures we can never straddle cache line so the alignment issue goes away. There's > a nice code size reduction too - see [1] . But I get build link errors in > networking code around DO_ONCE where the unlikely code is too much and offset > can't be encoded in signed 10 bits which B_S is allowed. Yeah, so on x86 we have a 2 byte and a 5 byte relative jump and have the exact same issue. We're currently using 5 byte jumps unconditionally for the same reason. Getting it to use the 2 byte one where possible is a 'fun' project for someone with spare time at some point. It might need a GCC plugin to pull off, I've not put too much tought into it.