From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Zijlstra Subject: Re: [PATCH 00/22] add support for Clang LTO Date: Thu, 2 Jul 2020 10:20:40 +0200 Message-ID: <20200702082040.GB4781@hirez.programming.kicks-ass.net> References: <20200625082433.GC117543@hirez.programming.kicks-ass.net> <20200625085745.GD117543@hirez.programming.kicks-ass.net> <20200630191931.GA884155@elver.google.com> <20200630201243.GD4817@hirez.programming.kicks-ass.net> <20200630203016.GI9247@paulmck-ThinkPad-P72> <20200701114027.GO4800@hirez.programming.kicks-ass.net> <20200701140654.GL9247@paulmck-ThinkPad-P72> <20200701150512.GH4817@hirez.programming.kicks-ass.net> <20200701160338.GN9247@paulmck-ThinkPad-P72> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20200701160338.GN9247@paulmck-ThinkPad-P72> Sender: linux-kernel-owner@vger.kernel.org To: "Paul E. McKenney" Cc: Marco Elver , Nick Desaulniers , Sami Tolvanen , Masahiro Yamada , Will Deacon , Greg Kroah-Hartman , Kees Cook , clang-built-linux , Kernel Hardening , linux-arch , Linux ARM , Linux Kbuild mailing list , LKML , linux-pci@vger.kernel.org, "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" List-Id: linux-arch.vger.kernel.org On Wed, Jul 01, 2020 at 09:03:38AM -0700, Paul E. McKenney wrote: > But it looks like we are going to have to tell the compiler. What does the current proposal look like? I can certainly annotate the seqcount latch users, but who knows what other code is out there.... From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726089AbgGBIUs (ORCPT ); Thu, 2 Jul 2020 04:20:48 -0400 Date: Thu, 2 Jul 2020 10:20:40 +0200 From: Peter Zijlstra Subject: Re: [PATCH 00/22] add support for Clang LTO Message-ID: <20200702082040.GB4781@hirez.programming.kicks-ass.net> References: <20200625082433.GC117543@hirez.programming.kicks-ass.net> <20200625085745.GD117543@hirez.programming.kicks-ass.net> <20200630191931.GA884155@elver.google.com> <20200630201243.GD4817@hirez.programming.kicks-ass.net> <20200630203016.GI9247@paulmck-ThinkPad-P72> <20200701114027.GO4800@hirez.programming.kicks-ass.net> <20200701140654.GL9247@paulmck-ThinkPad-P72> <20200701150512.GH4817@hirez.programming.kicks-ass.net> <20200701160338.GN9247@paulmck-ThinkPad-P72> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200701160338.GN9247@paulmck-ThinkPad-P72> Sender: linux-arch-owner@vger.kernel.org List-ID: To: "Paul E. McKenney" Cc: Marco Elver , Nick Desaulniers , Sami Tolvanen , Masahiro Yamada , Will Deacon , Greg Kroah-Hartman , Kees Cook , clang-built-linux , Kernel Hardening , linux-arch , Linux ARM , Linux Kbuild mailing list , LKML , linux-pci@vger.kernel.org, "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" Message-ID: <20200702082040.DdQMw4cRM-ztPnDmUYKxGbzuPB-FN8jkjdVrWU70ZQk@z> On Wed, Jul 01, 2020 at 09:03:38AM -0700, Paul E. McKenney wrote: > But it looks like we are going to have to tell the compiler. What does the current proposal look like? I can certainly annotate the seqcount latch users, but who knows what other code is out there....