From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D53CC388F2 for ; Thu, 22 Oct 2020 13:47:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4FCA5222E9 for ; Thu, 22 Oct 2020 13:47:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2900449AbgJVNr5 (ORCPT ); Thu, 22 Oct 2020 09:47:57 -0400 Received: from foss.arm.com ([217.140.110.172]:58142 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2900438AbgJVNr4 (ORCPT ); Thu, 22 Oct 2020 09:47:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E073E101E; Thu, 22 Oct 2020 06:47:55 -0700 (PDT) Received: from e107158-lin (e107158-lin.cambridge.arm.com [10.1.194.78]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C9993F66E; Thu, 22 Oct 2020 06:47:54 -0700 (PDT) Date: Thu, 22 Oct 2020 14:47:52 +0100 From: Qais Yousef To: Will Deacon Cc: Catalin Marinas , Marc Zyngier , "Peter Zijlstra (Intel)" , Morten Rasmussen , Greg Kroah-Hartman , Linus Torvalds , James Morse , linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org Subject: Re: [RFC PATCH v2 4/4] arm64: Export id_aar64fpr0 via sysfs Message-ID: <20201022134752.wtcdkbi4fjn2blh6@e107158-lin> References: <20201021104611.2744565-1-qais.yousef@arm.com> <20201021104611.2744565-5-qais.yousef@arm.com> <63fead90e91e08a1b173792b06995765@kernel.org> <20201021121559.GB3976@gaia> <20201021144112.GA17912@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201021144112.GA17912@willie-the-truck> Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On 10/21/20 15:41, Will Deacon wrote: > > We already expose MIDR and REVIDR via the current sysfs interface. We > > can expand it to include _all_ the other ID_* regs currently available > > to user via the MRS emulation and we won't have to debate what a new > > interface would look like. The MRS emulation and the sysfs info should > > probably match, though that means we need to expose the > > ID_AA64PFR0_EL1.EL0 field which we currently don't. > > > > I do agree that an AArch32 cpumask is an easier option both from the > > kernel implementation perspective and from the application usability > > one, though not as easy as automatic task placement by the scheduler (my > > first preference, followed by the id_* regs and the aarch32 mask, though > > not a strong preference for any). > > If a cpumask is easier to implement and easier to use, then I think that's > what we should do. It's also then dead easy to disable if necessary by > just returning 0. The only alternative I would prefer is not having to > expose this information altogether, but I'm not sure that figuring this > out from MIDR/REVIDR alone is reliable. So the mask idea is about adding a new /sys/devices/system/cpu/aarch32_cpus ? I just need to make sure that Peter and Greg are happy with this arm64 specific mask added to sysfs in this manner. Not sure if there's a precedent of archs exporting special masks in sysfs. Or maybe people had something else in mind about how his this mask should be exported? Thanks -- Qais Yousef