From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Qais Yousef <qais.yousef@arm.com>
Cc: Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
Morten Rasmussen <morten.rasmussen@arm.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
James Morse <james.morse@arm.com>,
linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org
Subject: Re: [RFC PATCH v2 4/4] arm64: Export id_aar64fpr0 via sysfs
Date: Mon, 26 Oct 2020 20:08:05 +0100 [thread overview]
Message-ID: <20201026190805.GA897386@kroah.com> (raw)
In-Reply-To: <20201026190250.aktgow74haieek7v@e107158-lin>
On Mon, Oct 26, 2020 at 07:02:50PM +0000, Qais Yousef wrote:
> On 10/22/20 15:55, Greg Kroah-Hartman wrote:
> > On Thu, Oct 22, 2020 at 02:47:52PM +0100, Qais Yousef wrote:
> > > On 10/21/20 15:41, Will Deacon wrote:
> > > > > We already expose MIDR and REVIDR via the current sysfs interface. We
> > > > > can expand it to include _all_ the other ID_* regs currently available
> > > > > to user via the MRS emulation and we won't have to debate what a new
> > > > > interface would look like. The MRS emulation and the sysfs info should
> > > > > probably match, though that means we need to expose the
> > > > > ID_AA64PFR0_EL1.EL0 field which we currently don't.
> > > > >
> > > > > I do agree that an AArch32 cpumask is an easier option both from the
> > > > > kernel implementation perspective and from the application usability
> > > > > one, though not as easy as automatic task placement by the scheduler (my
> > > > > first preference, followed by the id_* regs and the aarch32 mask, though
> > > > > not a strong preference for any).
> > > >
> > > > If a cpumask is easier to implement and easier to use, then I think that's
> > > > what we should do. It's also then dead easy to disable if necessary by
> > > > just returning 0. The only alternative I would prefer is not having to
> > > > expose this information altogether, but I'm not sure that figuring this
> > > > out from MIDR/REVIDR alone is reliable.
> > >
> > > So the mask idea is about adding a new
> > >
> > > /sys/devices/system/cpu/aarch32_cpus
> > >
> > > ?
> >
> > Is this a file, a directory, or what? What's the contents?
> >
> > Without any of that, I have no idea if it's "ok" or not...
>
> Hopefully the below patch explains better. Note that I added the new attribute
> to driver/base/cpu.c, but assuming we will still want to go down this route, we
> will need a generic way for archs to add their attributes to
> /sys/devices/system/cpu/.
>
> Something like having a special define for archs to append their own
> attributes list
>
> #define SYSFS_SYSTEM_CPU_ARCH_ATTRIBUTES
>
> Or probably there's a way to add this file (attribute) dynamically from arch
> code that I just didn't figure out how to do yet.
Please do that, sysfs files should not be present when the information
is not needed from them. Look at the is_visible() callback for the
attribute for how to do it.
>
> Thanks
>
> --
> Qais Yousef
>
>
> ---------->8------------
>
> >From 96dfdfdacb2a26a60ba19051e8c72e839eb5408b Mon Sep 17 00:00:00 2001
> From: Qais Yousef <qais.yousef@arm.com>
> Date: Mon, 26 Oct 2020 16:33:32 +0000
> Subject: [PATCH] arm64: export aarch32_online mask in sysfs
>
> This patch to be applied on top of arm64 Asymmetric AArch32 support.
>
> It explores the option of exporting the AArch32 capable cpus as a mask
> on sysfs.
>
> This is to help drive the discussion on the API before sending the next
> version which I yet to address some of the review comments.
>
> The output looks like:
>
> # cat /sys/devices/system/cpu/aarch32_online
> 0-5
>
> Signed-off-by: Qais Yousef <qais.yousef@arm.com>
> ---
> Documentation/ABI/testing/sysfs-devices-system-cpu | 7 +++++++
> arch/arm64/include/asm/cpufeature.h | 2 ++
> arch/arm64/kernel/cpufeature.c | 8 ++++++++
> drivers/base/cpu.c | 12 ++++++++++++
> 4 files changed, 29 insertions(+)
>
> diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
> index b555df825447..9ccb5c3f5ee3 100644
> --- a/Documentation/ABI/testing/sysfs-devices-system-cpu
> +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
> @@ -36,6 +36,13 @@ Description: CPU topology files that describe kernel limits related to
>
> See Documentation/admin-guide/cputopology.rst for more information.
>
> +What: /sys/devices/system/cpu/aarch32_online
> +Date: October 2020
> +Contact: Linux ARM Kernel Mailing list <linux-arm-kernel@lists.infradead.org>
> +Description: CPU topology file that describes which cpus support AArch32 at
> + EL0. Only available on arm64.
> +
> + The value is updated when a cpu becomes online then sticks.
What does "then sticks" mean?
>
> What: /sys/devices/system/cpu/probe
> /sys/devices/system/cpu/release
> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> index 2b87f17b2bd4..edd18002ad81 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -380,6 +380,8 @@ cpucap_multi_entry_cap_matches(const struct arm64_cpu_capabilities *entry,
> return false;
> }
>
> +extern cpumask_t aarch32_el0_mask;
> +
> extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
> extern struct static_key_false cpu_hwcap_keys[ARM64_NCAPS];
> extern struct static_key_false arm64_const_caps_ready;
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 0f7307c8ad80..662bbc2b15cd 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -1723,6 +1723,13 @@ cpucap_panic_on_conflict(const struct arm64_cpu_capabilities *cap)
> return !!(cap->type & ARM64_CPUCAP_PANIC_ON_CONFLICT);
> }
>
> +cpumask_t aarch32_el0_mask;
> +static void cpu_enable_aarch32_el0(struct arm64_cpu_capabilities const *cap)
> +{
> + if (has_cpuid_feature(cap, SCOPE_LOCAL_CPU))
> + cpumask_set_cpu(smp_processor_id(), &aarch32_el0_mask);
> +}
> +
> static const struct arm64_cpu_capabilities arm64_features[] = {
> {
> .desc = "GIC system register CPU interface",
> @@ -1809,6 +1816,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> {
> .capability = ARM64_HAS_ASYM_32BIT_EL0,
> .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
> + .cpu_enable = cpu_enable_aarch32_el0,
> .matches = has_cpuid_feature,
> .sys_reg = SYS_ID_AA64PFR0_EL1,
> .sign = FTR_UNSIGNED,
> diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
> index d2136ab9b14a..569baacde508 100644
> --- a/drivers/base/cpu.c
> +++ b/drivers/base/cpu.c
> @@ -459,6 +459,15 @@ EXPORT_SYMBOL_GPL(cpu_device_create);
> static DEVICE_ATTR(modalias, 0444, print_cpu_modalias, NULL);
> #endif
>
> +#ifdef CONFIG_ARM64
> +static ssize_t print_aarch32_online(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + return cpumap_print_to_pagebuf(true, buf, &aarch32_el0_mask);
> +}
> +static DEVICE_ATTR(aarch32_online, 0444, print_aarch32_online, NULL);
DEVICE_ATTR_RO()?
> +#endif
Hah, no, no arch-specific stuff in here, sorry. Please do this properly
in your arch-specific code only.
thanks,
greg k-h
next prev parent reply other threads:[~2020-10-26 19:13 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-21 10:46 [RFC PATCH v2 0/4] Add support for Asymmetric AArch32 systems Qais Yousef
2020-10-21 10:46 ` [RFC PATCH v2 1/4] arm64: kvm: Handle " Qais Yousef
2020-10-21 12:02 ` Marc Zyngier
2020-10-21 13:35 ` Qais Yousef
2020-10-21 13:51 ` Marc Zyngier
2020-10-21 14:38 ` Qais Yousef
2020-11-02 17:58 ` Qais Yousef
2020-10-21 10:46 ` [RFC PATCH v2 2/4] arm64: Add support for asymmetric AArch32 EL0 configurations Qais Yousef
2020-10-21 15:39 ` Will Deacon
2020-10-21 16:21 ` Qais Yousef
2020-10-21 16:52 ` Catalin Marinas
2020-10-21 17:39 ` Will Deacon
2020-10-22 9:53 ` Catalin Marinas
2020-10-21 10:46 ` [RFC PATCH v2 3/4] arm64: export emulate_sys_reg() Qais Yousef
2020-10-21 10:46 ` [RFC PATCH v2 4/4] arm64: Export id_aar64fpr0 via sysfs Qais Yousef
2020-10-21 11:09 ` Marc Zyngier
2020-10-21 11:25 ` Greg Kroah-Hartman
2020-10-21 11:46 ` Marc Zyngier
2020-10-21 12:11 ` Greg Kroah-Hartman
2020-10-21 13:18 ` Qais Yousef
2020-10-21 12:15 ` Catalin Marinas
2020-10-21 13:20 ` Qais Yousef
2020-10-21 13:33 ` Morten Rasmussen
2020-10-21 14:09 ` Catalin Marinas
2020-10-21 14:41 ` Morten Rasmussen
2020-10-21 14:45 ` Will Deacon
2020-10-21 15:10 ` Catalin Marinas
2020-10-21 15:37 ` Will Deacon
2020-10-21 16:18 ` Catalin Marinas
2020-10-21 17:19 ` Will Deacon
2020-10-22 9:55 ` Morten Rasmussen
2020-10-21 14:31 ` Qais Yousef
2020-10-22 10:16 ` Morten Rasmussen
2020-10-22 10:48 ` Qais Yousef
2020-10-21 14:41 ` Will Deacon
2020-10-21 15:03 ` Qais Yousef
2020-10-21 15:23 ` Will Deacon
2020-10-21 16:07 ` Qais Yousef
2020-10-21 17:23 ` Will Deacon
2020-10-21 19:57 ` Qais Yousef
2020-10-21 20:26 ` Will Deacon
2020-10-22 8:16 ` Catalin Marinas
2020-10-22 9:58 ` Qais Yousef
2020-10-22 13:47 ` Qais Yousef
2020-10-22 13:55 ` Greg Kroah-Hartman
2020-10-22 14:31 ` Catalin Marinas
2020-10-22 14:34 ` Qais Yousef
2020-10-26 19:02 ` Qais Yousef
2020-10-26 19:08 ` Greg Kroah-Hartman [this message]
2020-10-26 19:18 ` Qais Yousef
2020-10-21 11:28 ` Greg Kroah-Hartman
2020-10-21 13:22 ` Qais Yousef
2020-10-21 11:26 ` [RFC PATCH v2 0/4] Add support for Asymmetric AArch32 systems Greg Kroah-Hartman
2020-10-21 13:15 ` Qais Yousef
2020-10-21 13:31 ` Greg Kroah-Hartman
2020-10-21 13:55 ` Qais Yousef
2020-10-21 14:35 ` Catalin Marinas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201026190805.GA897386@kroah.com \
--to=gregkh@linuxfoundation.org \
--cc=catalin.marinas@arm.com \
--cc=james.morse@arm.com \
--cc=linux-arch@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=morten.rasmussen@arm.com \
--cc=peterz@infradead.org \
--cc=qais.yousef@arm.com \
--cc=torvalds@linux-foundation.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).