From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8C94C2B9F7 for ; Wed, 26 May 2021 05:23:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7A868613C1 for ; Wed, 26 May 2021 05:23:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229553AbhEZFYo (ORCPT ); Wed, 26 May 2021 01:24:44 -0400 Received: from verein.lst.de ([213.95.11.211]:33262 "EHLO verein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229522AbhEZFYm (ORCPT ); Wed, 26 May 2021 01:24:42 -0400 Received: by verein.lst.de (Postfix, from userid 2407) id 46E216736F; Wed, 26 May 2021 07:23:09 +0200 (CEST) Date: Wed, 26 May 2021 07:23:08 +0200 From: Christoph Hellwig To: Guo Ren Cc: Christoph Hellwig , Anup Patel , Palmer Dabbelt , Arnd Bergmann , linux-riscv , Linux Kernel Mailing List , linux-arch , linux-sunxi@lists.linux.dev, Guo Ren Subject: Re: [PATCH V3 2/2] riscv: Use use_asid_allocator flush TLB Message-ID: <20210526052308.GA29213@lst.de> References: <1621945447-38820-1-git-send-email-guoren@kernel.org> <1621945447-38820-3-git-send-email-guoren@kernel.org> <20210525123556.GB4842@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.17 (2007-11-01) Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org On Wed, May 26, 2021 at 11:12:40AM +0800, Guo Ren wrote: > > static inline void local_flush_tlb_range_asid(unsigned long start, > > unsigned long size, unsigned long asid) > > > > > +{ > > > + unsigned long tmp = start & PAGE_MASK; > > > + unsigned long end = ALIGN(start + size, PAGE_SIZE); > > > + > > > + if (size == -1) { > > > + __asm__ __volatile__ ("sfence.vma x0, %0" : : "r" (asid) : "memory"); > > > + return; > > > > Please split the global (size == -1) case into separate helpers. > Do you mean: No. Basically a static inline void local_flush_tlb_ll_asid(unsigned long asid) { __asm__ __volatile__ ("sfence.vma x0, %0" : : "r" (asid) : "memory"); } and static inline void local_flush_tlb_range_asid(unsigned long start, unsigned long size, unsigned long asid) { unsigned long end = ALIGN(start + size, PAGE_SIZE), tmp; for (tmp = start & PAGE_MASK; tmp < end; tmp += PAGE_SIZE) { __asm__ __volatile__ ("sfence.vma %0, %1" : : "r" (tmp), "r" (asid) : "memory"); } }