From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CED2EC433FE for ; Sun, 2 Oct 2022 01:27:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229577AbiJBB1s (ORCPT ); Sat, 1 Oct 2022 21:27:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229719AbiJBB1S (ORCPT ); Sat, 1 Oct 2022 21:27:18 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E3AD58154; Sat, 1 Oct 2022 18:26:27 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 226D8CE0986; Sun, 2 Oct 2022 01:26:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 62F5DC433B5; Sun, 2 Oct 2022 01:26:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664673983; bh=4oHXfV11l+JA10+Jvj388oZwJkjl0J5Q1sFgO4/Sa2o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WeWS6RcMiMeQqV1d774MCywsY/bFDbmipPr+cdYl3L7vRJhZDyuAWTMYPtn/HSGU5 /CnsSV7kNPu/FEVXQ/kVuctUaDCRFRL0fO7UsPQ5lFy/JT18U9shyC+WCPXcskoRqW wmAjfg77UlAS5iFk28UhR5khJi8kAhEOBsy75ItPgA2ouOU4IxjKe9AB6CV/0yGvMt 8cbJVymNOSHBdxh/SqmLrVPbTF1r+1FErrlpQH/2TaCF5x+u4p/lUdTML/IxAe6WfJ aG+QJavO2I6bSHhTTy8kaKoAzXfRwStq05+NRvXigp85yjgO5NAFadCJRCDx2Hihl/ Xf5RYb2766HvQ== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , Andreas Schwab Subject: [PATCH V6 10/11] riscv: Add config of thread stack size Date: Sat, 1 Oct 2022 21:24:50 -0400 Message-Id: <20221002012451.2351127-11-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221002012451.2351127-1-guoren@kernel.org> References: <20221002012451.2351127-1-guoren@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org From: Guo Ren 0cac21b02ba5 ("risc v: use 16KB kernel stack on 64-bit") increase the thread size mandatory, but some scenarios, such as D1 with a small memory footprint, would suffer from that. After independent irq stack support, let's give users a choice to determine their custom stack size. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Andreas Schwab --- arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/include/asm/thread_info.h | 12 +----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 76bde12d9f8c..602e577c429c 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -443,6 +443,16 @@ config IRQ_STACKS Add independent irq & softirq stacks for percpu to prevent kernel stack overflows. We may save some memory footprint by disabling IRQ_STACKS. +config THREAD_SIZE_ORDER + int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT + range 0 4 + default 1 if 32BIT && !KASAN + default 3 if 64BIT && KASAN + default 2 + help + Specify the Pages of thread stack size (from 4KB to 64KB), which also + affects irq stack size, which is equal to thread stack size. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 043da8ccc7e6..c970d41dc4c6 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -11,18 +11,8 @@ #include #include -#ifdef CONFIG_KASAN -#define KASAN_STACK_ORDER 1 -#else -#define KASAN_STACK_ORDER 0 -#endif - /* thread information allocation */ -#ifdef CONFIG_64BIT -#define THREAD_SIZE_ORDER (2 + KASAN_STACK_ORDER) -#else -#define THREAD_SIZE_ORDER (1 + KASAN_STACK_ORDER) -#endif +#define THREAD_SIZE_ORDER CONFIG_THREAD_SIZE_ORDER #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) /* -- 2.36.1