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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2022 10:48:26.3863 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 68e6e44f-440c-4d2a-b8f8-08daa6bf21f1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT009.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6439 Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org The cited commit describes that when using writel(), explcit wmb() is not needed. wmb() is an expensive barrier. writel() uses the needed platform specific barrier instead of expensive wmb(). Hence update the example to be more accurate that matches the current implementation. commit 5846581e3563 ("locking/memory-barriers.txt: Fix broken DMA vs. MMIO ordering example") Signed-off-by: Parav Pandit --- changelog: v1->v2: - Further improved description of writel() example - changed commit subject from 'usage' to 'example' v0->v1: - Corrected to mention I/O barrier instead of dma_wmb(). - removed numbered references in commit log - corrected typo 'explcit' to 'explicit' in commit log --- Documentation/memory-barriers.txt | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 832b5d36e279..49e1433db407 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -1927,10 +1927,12 @@ There are some more advanced barrier functions: before we read the data from the descriptor, and the dma_wmb() allows us to guarantee the data is written to the descriptor before the device can see it now has ownership. The dma_mb() implies both a dma_rmb() and - a dma_wmb(). Note that, when using writel(), a prior wmb() is not needed - to guarantee that the cache coherent memory writes have completed before - writing to the MMIO region. The cheaper writel_relaxed() does not provide - this guarantee and must not be used here. + a dma_wmb(). Note that, when using writel(), a prior barrier is not + needed to guarantee that the cache coherent memory writes have completed + before writing to the MMIO region. The cheaper writel_relaxed() does not + provide this guarantee and must not be used here. Hence, writeX() is always + preferred which inserts needed platform specific barrier before writing to + the specified MMIO region. See the subsection "Kernel I/O barrier effects" for more information on relaxed I/O accessors and the Documentation/core-api/dma-api.rst file for -- 2.26.2