From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D131C7EE22 for ; Thu, 18 May 2023 13:12:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231343AbjERNMs (ORCPT ); Thu, 18 May 2023 09:12:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231336AbjERNMn (ORCPT ); Thu, 18 May 2023 09:12:43 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1167B1999; Thu, 18 May 2023 06:11:58 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 89D1364F44; Thu, 18 May 2023 13:11:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3B023C433D2; Thu, 18 May 2023 13:11:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1684415492; bh=kwYbV+xRqnM3gD5wja5IP2IYhT3BPYOFw/sxTmqeyds=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tebfDu2ciCGlWfmOzk3QjqBAf9k6FxRFj7jmur4lv4YYgmCqMwYndQMkm/TX5ALdr ahSuRZujS7dWo/DAxOKxBUAyoU2L7N5xr8A0BvnwSqYyibaEpV8BhHb94puApoRjfN 0wJpP+cKegCUiSc3U4UPwgoIzrXWQze32a23f7IDPdtkunSTAJgoYFkRL1ycW0/Isq 3t+c9hz2PtbDnszFGKOPxXjZgXL1mfQWMblibSnBovz/83Borj9U0Mf+6/2KifouyE oz7PCD3ulfIeKgtZ+BrOCR8DT4EGQCxUw0Wvzb6d8X1HWDulB2UMy5eHOeJnNkulsN fb9+hL6VaPVCA== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, bjorn@kernel.org, paul.walmsley@sifive.com, catalin.marinas@arm.com, will@kernel.org, rppt@kernel.org, anup@brainfault.org, shihua@iscas.ac.cn, jiawei@iscas.ac.cn, liweiwei@iscas.ac.cn, luxufan@iscas.ac.cn, chunyu@iscas.ac.cn, tsu.yubo@gmail.com, wefu@redhat.com, wangjunqiang@iscas.ac.cn, kito.cheng@sifive.com, andy.chiu@sifive.com, vincent.chen@sifive.com, greentime.hu@sifive.com, corbet@lwn.net, wuwei2016@iscas.ac.cn, jrtc27@jrtc27.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [RFC PATCH 04/22] clocksource: riscv: s64ilp32: Use __riscv_xlen instead of CONFIG_32BIT Date: Thu, 18 May 2023 09:09:55 -0400 Message-Id: <20230518131013.3366406-5-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230518131013.3366406-1-guoren@kernel.org> References: <20230518131013.3366406-1-guoren@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arch@vger.kernel.org From: Guo Ren When s64ilp32 enabled, CONFIG_32BIT=y but __riscv_xlen=64. So we must use __riscv_xlen to detect real machine XLEN for CSR access. Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- drivers/clocksource/timer-riscv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 5f0f10c7e222..459a634012ce 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -37,7 +37,7 @@ static int riscv_clock_next_event(unsigned long delta, csr_set(CSR_IE, IE_TIE); if (static_branch_likely(&riscv_sstc_available)) { -#if defined(CONFIG_32BIT) +#if __riscv_xlen == 32 csr_write(CSR_STIMECMP, next_tval & 0xFFFFFFFF); csr_write(CSR_STIMECMPH, next_tval >> 32); #else -- 2.36.1