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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Arnd Bergmann <arnd@arndb.de>, Oleg Nesterov <oleg@redhat.com>,
	Eric Biederman <ebiederm@xmission.com>,
	Kees Cook <keescook@chromium.org>, Shuah Khan <shuah@kernel.org>,
	"Rick P. Edgecombe" <rick.p.edgecombe@intel.com>,
	Deepak Gupta <debug@rivosinc.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Szabolcs Nagy <Szabolcs.Nagy@arm.com>
Cc: "H.J. Lu" <hjl.tools@gmail.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Florian Weimer <fweimer@redhat.com>,
	Christian Brauner <brauner@kernel.org>,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org,
	linux-arch@vger.kernel.org, linux-mm@kvack.org,
	linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v6 10/38] arm64/cpufeature: Runtime detection of Guarded Control Stack (GCS)
Date: Mon, 09 Oct 2023 13:08:44 +0100	[thread overview]
Message-ID: <20231009-arm64-gcs-v6-10-78e55deaa4dd@kernel.org> (raw)
In-Reply-To: <20231009-arm64-gcs-v6-0-78e55deaa4dd@kernel.org>

Add a cpufeature for GCS, allowing other code to conditionally support it
at runtime.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/cpufeature.h |  6 ++++++
 arch/arm64/kernel/cpufeature.c      | 16 ++++++++++++++++
 arch/arm64/tools/cpucaps            |  1 +
 3 files changed, 23 insertions(+)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 5bba39376055..4a5eea41f8ed 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -831,6 +831,12 @@ static inline bool system_supports_tlb_range(void)
 		cpus_have_const_cap(ARM64_HAS_TLB_RANGE);
 }
 
+static inline bool system_supports_gcs(void)
+{
+	return IS_ENABLED(CONFIG_ARM64_GCS) &&
+		cpus_have_const_cap(ARM64_HAS_GCS);
+}
+
 int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt);
 bool try_emulate_mrs(struct pt_regs *regs, u32 isn);
 
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 444a73c2e638..e247dce1759c 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -255,6 +255,8 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = {
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_GCS),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_GCS_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),
 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_SME_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_MPAM_frac_SHIFT, 4, 0),
@@ -2220,6 +2222,12 @@ static void cpu_enable_mops(const struct arm64_cpu_capabilities *__unused)
 	sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_MSCEn);
 }
 
+static void cpu_enable_gcs(const struct arm64_cpu_capabilities *__unused)
+{
+	/* GCS is not currently used at EL1 */
+	write_sysreg_s(0, SYS_GCSCR_EL1);
+}
+
 /* Internal helper functions to match cpu capability type */
 static bool
 cpucap_late_cpu_optional(const struct arm64_cpu_capabilities *cap)
@@ -2719,6 +2727,14 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
 		.matches = has_cpuid_feature,
 		ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, EVT, IMP)
 	},
+	{
+		.desc = "Guarded Control Stack (GCS)",
+		.capability = ARM64_HAS_GCS,
+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
+		.cpu_enable = cpu_enable_gcs,
+		.matches = has_cpuid_feature,
+		ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, GCS, IMP)
+	},
 	{},
 };
 
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index c3f06fdef609..9b470b311f29 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -27,6 +27,7 @@ HAS_ECV_CNTPOFF
 HAS_EPAN
 HAS_EVT
 HAS_FGT
+HAS_GCS
 HAS_GENERIC_AUTH
 HAS_GENERIC_AUTH_ARCH_QARMA3
 HAS_GENERIC_AUTH_ARCH_QARMA5

-- 
2.30.2


  parent reply	other threads:[~2023-10-09 12:12 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-09 12:08 [PATCH v6 00/38] arm64/gcs: Provide support for GCS in userspace Mark Brown
2023-10-09 12:08 ` [PATCH v6 01/38] arm64/mm: Restructure arch_validate_flags() for extensibility Mark Brown
2023-10-09 12:08 ` [PATCH v6 02/38] prctl: arch-agnostic prctl for shadow stack Mark Brown
2023-10-09 12:08 ` [PATCH v6 03/38] mman: Add map_shadow_stack() flags Mark Brown
2023-10-09 12:08 ` [PATCH v6 04/38] arm64: Document boot requirements for Guarded Control Stacks Mark Brown
2023-10-09 12:08 ` [PATCH v6 05/38] arm64/gcs: Document the ABI " Mark Brown
2023-10-09 12:08 ` [PATCH v6 06/38] arm64/sysreg: Add new system registers for GCS Mark Brown
2023-10-09 12:08 ` [PATCH v6 07/38] arm64/sysreg: Add definitions for architected GCS caps Mark Brown
2023-10-09 12:08 ` [PATCH v6 08/38] arm64/gcs: Add manual encodings of GCS instructions Mark Brown
2023-10-09 12:08 ` [PATCH v6 09/38] arm64/gcs: Provide copy_to_user_gcs() Mark Brown
2023-10-09 12:08 ` Mark Brown [this message]
2023-10-09 12:08 ` [PATCH v6 11/38] arm64/mm: Allocate PIE slots for EL0 guarded control stack Mark Brown
2023-10-09 12:08 ` [PATCH v6 12/38] mm: Define VM_SHADOW_STACK for arm64 when we support GCS Mark Brown
2023-10-09 12:08 ` [PATCH v6 13/38] arm64/mm: Map pages for guarded control stack Mark Brown
2023-10-09 12:08 ` [PATCH v6 14/38] KVM: arm64: Manage GCS registers for guests Mark Brown
2023-10-09 12:08 ` [PATCH v6 15/38] arm64/gcs: Allow GCS usage at EL0 and EL1 Mark Brown
2023-10-09 12:08 ` [PATCH v6 16/38] arm64/idreg: Add overrride for GCS Mark Brown
2023-10-09 12:08 ` [PATCH v6 17/38] arm64/hwcap: Add hwcap " Mark Brown
2023-10-09 12:08 ` [PATCH v6 18/38] arm64/traps: Handle GCS exceptions Mark Brown
2023-10-09 12:08 ` [PATCH v6 19/38] arm64/mm: Handle GCS data aborts Mark Brown
2023-10-09 12:08 ` [PATCH v6 20/38] arm64/gcs: Context switch GCS state for EL0 Mark Brown
2023-10-09 12:08 ` [PATCH v6 21/38] arm64/gcs: Allocate a new GCS for threads with GCS enabled Mark Brown
2023-10-09 12:08 ` [PATCH v6 22/38] arm64/gcs: Implement shadow stack prctl() interface Mark Brown
2023-10-09 12:08 ` [PATCH v6 23/38] arm64/mm: Implement map_shadow_stack() Mark Brown
2023-10-09 12:08 ` [PATCH v6 24/38] arm64/signal: Set up and restore the GCS context for signal handlers Mark Brown
2023-10-09 12:08 ` [PATCH v6 25/38] arm64/signal: Expose GCS state in signal frames Mark Brown
2023-10-09 12:09 ` [PATCH v6 26/38] arm64/ptrace: Expose GCS via ptrace and core files Mark Brown
2023-10-09 12:09 ` [PATCH v6 27/38] arm64: Add Kconfig for Guarded Control Stack (GCS) Mark Brown
2023-10-09 12:09 ` [PATCH v6 28/38] kselftest/arm64: Verify the GCS hwcap Mark Brown
2023-10-09 12:09 ` [PATCH v6 29/38] kselftest/arm64: Add GCS as a detected feature in the signal tests Mark Brown
2023-10-09 12:09 ` [PATCH v6 30/38] kselftest/arm64: Add framework support for GCS to signal handling tests Mark Brown
2023-10-09 12:09 ` [PATCH v6 31/38] kselftest/arm64: Allow signals tests to specify an expected si_code Mark Brown
2023-10-09 12:09 ` [PATCH v6 32/38] kselftest/arm64: Always run signals tests with GCS enabled Mark Brown
2023-10-09 12:09 ` [PATCH v6 33/38] kselftest/arm64: Add very basic GCS test program Mark Brown
2023-10-09 12:09 ` [PATCH v6 34/38] kselftest/arm64: Add a GCS test program built with the system libc Mark Brown
2023-10-09 12:09 ` [PATCH v6 35/38] kselftest/arm64: Add test coverage for GCS mode locking Mark Brown
2023-10-09 12:09 ` [PATCH v6 36/38] selftests/arm64: Add GCS signal tests Mark Brown
2023-10-09 12:09 ` [PATCH v6 37/38] kselftest/arm64: Add a GCS stress test Mark Brown
2023-10-09 12:09 ` [PATCH v6 38/38] kselftest/arm64: Enable GCS for the FP stress tests Mark Brown

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