From: guoren@kernel.org
To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com,
tglx@linutronix.de, conor.dooley@microchip.com, heiko@sntech.de,
apatel@ventanamicro.com, atishp@atishpatra.org, bjorn@kernel.org,
paul.walmsley@sifive.com, anup@brainfault.org,
jiawei@iscas.ac.cn, liweiwei@iscas.ac.cn, wefu@redhat.com,
U2FsdGVkX1@gmail.com, wangjunqiang@iscas.ac.cn,
kito.cheng@sifive.com, andy.chiu@sifive.com,
vincent.chen@sifive.com, greentime.hu@sifive.com,
wuwei2016@iscas.ac.cn, jrtc27@jrtc27.com, luto@kernel.org,
fweimer@redhat.com, catalin.marinas@arm.com, hjl.tools@gmail.com
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org,
Guo Ren <guoren@linux.alibaba.com>
Subject: [RFC PATCH V2 18/38] riscv: s64ilp32: Add ebpf jit support
Date: Sun, 12 Nov 2023 01:14:54 -0500 [thread overview]
Message-ID: <20231112061514.2306187-19-guoren@kernel.org> (raw)
In-Reply-To: <20231112061514.2306187-1-guoren@kernel.org>
From: Guo Ren <guoren@linux.alibaba.com>
The s64ilp32 uses the rv64 ISA instruction set, not the rv32 ISA. So
bpf_jit_comp32.c can't be used for s64ilp32, and we use bpf_jit_comp64.c
instead. This patch makes s64ilp32 ebpf jit correct and improves the
performance because bpf_jit_comp32.c has significant gaps in mapping
ebpf 64-bit ISA.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
---
arch/riscv/include/asm/extable.h | 2 +-
arch/riscv/net/Makefile | 6 +++---
arch/riscv/net/bpf_jit_comp64.c | 6 +++---
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/riscv/include/asm/extable.h b/arch/riscv/include/asm/extable.h
index 3eb5c1f7bf34..7e22bb520309 100644
--- a/arch/riscv/include/asm/extable.h
+++ b/arch/riscv/include/asm/extable.h
@@ -38,7 +38,7 @@ bool fixup_exception(struct pt_regs *regs);
static inline bool fixup_exception(struct pt_regs *regs) { return false; }
#endif
-#if defined(CONFIG_BPF_JIT) && defined(CONFIG_ARCH_RV64I)
+#if defined(CONFIG_BPF_JIT) && !defined(CONFIG_ARCH_RV32I)
bool ex_handler_bpf(const struct exception_table_entry *ex, struct pt_regs *regs);
#else
static inline bool
diff --git a/arch/riscv/net/Makefile b/arch/riscv/net/Makefile
index 9a1e5f0a94e5..907edce21acc 100644
--- a/arch/riscv/net/Makefile
+++ b/arch/riscv/net/Makefile
@@ -2,8 +2,8 @@
obj-$(CONFIG_BPF_JIT) += bpf_jit_core.o
-ifeq ($(CONFIG_ARCH_RV64I),y)
- obj-$(CONFIG_BPF_JIT) += bpf_jit_comp64.o
-else
+ifeq ($(CONFIG_ARCH_RV32I),y)
obj-$(CONFIG_BPF_JIT) += bpf_jit_comp32.o
+else
+ obj-$(CONFIG_BPF_JIT) += bpf_jit_comp64.o
endif
diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
index c648864c8cd1..ec0b7fb6982b 100644
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -126,7 +126,7 @@ static u8 rv_tail_call_reg(struct rv_jit_context *ctx)
static bool is_32b_int(s64 val)
{
- return -(1L << 31) <= val && val < (1L << 31);
+ return -(1LL << 31) <= val && val < (1LL << 31);
}
static bool in_auipc_jalr_range(s64 val)
@@ -135,8 +135,8 @@ static bool in_auipc_jalr_range(s64 val)
* auipc+jalr can reach any signed PC-relative offset in the range
* [-2^31 - 2^11, 2^31 - 2^11).
*/
- return (-(1L << 31) - (1L << 11)) <= val &&
- val < ((1L << 31) - (1L << 11));
+ return (-(1LL << 31) - (1LL << 11)) <= val &&
+ val < ((1LL << 31) - (1LL << 11));
}
/* Emit fixed-length instructions for address */
--
2.36.1
next prev parent reply other threads:[~2023-11-12 6:17 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-12 6:14 [RFC PATCH V2 00/38] rv64ilp32: Running ILP32 on RV64 ISA guoren
2023-11-12 6:14 ` [RFC PATCH V2 01/38] riscv: u64ilp32: Unify vdso32 & compat_vdso into vdso/Makefile guoren
2023-11-12 6:14 ` [RFC PATCH V2 02/38] riscv: u64ilp32: Remove compat_vdso/ guoren
2023-11-12 6:14 ` [RFC PATCH V2 03/38] riscv: u64ilp32: Add time-related vDSO common flow for vdso32 guoren
2023-11-12 6:14 ` [RFC PATCH V2 04/38] riscv: u64ilp32: Introduce ILP32 vdso for UXL=64 guoren
2023-11-12 6:14 ` [RFC PATCH V2 05/38] riscv: u64ilp32: Adjust vDSO kernel flow for 64ilp32 abi guoren
2023-11-12 6:14 ` [RFC PATCH V2 06/38] riscv: u64ilp32: Add signal support for compat guoren
2023-11-12 6:14 ` [RFC PATCH V2 07/38] riscv: u64ilp32: Add ptrace interface support guoren
2023-11-12 6:14 ` [RFC PATCH V2 08/38] riscv: u64ilp32: Adjust vDSO alternative for 64ilp32 abi guoren
2023-11-12 6:14 ` [RFC PATCH V2 09/38] riscv: u64ilp32: Add xlen_t in user_regs_struct guoren
2023-11-12 6:14 ` [RFC PATCH V2 10/38] riscv: u64ilp32: Remove the restriction of UXL=32 guoren
2023-11-12 6:14 ` [RFC PATCH V2 11/38] riscv: u64ilp32: Enable user space runtime switch guoren
2023-11-12 6:14 ` [RFC PATCH V2 12/38] riscv: s64ilp32: Unify ULL & UL into UXL in csr guoren
2023-11-12 6:14 ` [RFC PATCH V2 13/38] riscv: s64ilp32: Introduce xlen_t for 64ILP32 kernel guoren
2023-11-12 6:14 ` [RFC PATCH V2 14/38] riscv: s64ilp32: Add sbi support guoren
2023-11-12 6:14 ` [RFC PATCH V2 15/38] riscv: s64ilp32: Add asid support guoren
2023-11-12 6:14 ` [RFC PATCH V2 16/38] riscv: s64ilp32: Introduce PTR_L and PTR_S guoren
2023-11-12 6:14 ` [RFC PATCH V2 17/38] riscv: s64ilp32: Adjust TASK_SIZE for s64ilp32 kernel guoren
2023-11-12 6:14 ` guoren [this message]
2023-11-12 6:14 ` [RFC PATCH V2 19/38] riscv: s64ilp32: Add ELF32 support guoren
2023-11-12 6:14 ` [RFC PATCH V2 20/38] riscv: s64ilp32: Add ARCH_RV64ILP32 Kconfig option guoren
2023-11-12 6:14 ` [RFC PATCH V2 21/38] riscv: s64ilp32: Add MMU_SV32 mode support guoren
2023-11-12 6:14 ` [RFC PATCH V2 22/38] riscv: s64ilp32: Add MMU_SV39 " guoren
2023-11-12 6:14 ` [RFC PATCH V2 23/38] riscv: s64ilp32: Enable native atomic64 guoren
2023-11-12 6:15 ` [RFC PATCH V2 24/38] riscv: s64ilp32: Add TImode (128 int) support guoren
2023-11-12 6:15 ` [RFC PATCH V2 25/38] riscv: s64ilp32: Implement cmpxchg_double guoren
2023-11-12 6:15 ` [RFC PATCH V2 26/38] riscv: s64ilp32: Disable KVM guoren
2023-11-12 6:15 ` [RFC PATCH V2 27/38] riscv: s64ilp32: Correct the rv64ilp32 stackframe layout guoren
2023-11-12 6:15 ` [RFC PATCH V2 28/38] riscv: s64ilp32: Temporary workaround solution to gcc problem guoren
2023-11-12 6:15 ` [RFC PATCH V2 29/38] riscv: s64ilp32: Introduce ARCH_HAS_64ILP32_KERNEL for syscall guoren
2023-11-12 6:15 ` [RFC PATCH V2 30/38] riscv: s64ilp32: Add u32ilp32 ptrace support guoren
2023-11-12 6:15 ` [RFC PATCH V2 31/38] riscv: s64ilp32: Add u32ilp32 signal support guoren
2023-11-12 6:15 ` [RFC PATCH V2 32/38] riscv: s64ilp32: Validate harts by architecture name guoren
2023-11-12 6:15 ` [RFC PATCH V2 33/38] riscv: s64ilp32: Add rv64ilp32_defconfig guoren
2023-11-12 6:15 ` [RFC PATCH V2 34/38] riscv: Cleanup rv32_defconfig guoren
2023-11-12 6:15 ` [RFC PATCH V2 35/38] clocksource: riscv: s64ilp32: Use __riscv_xlen instead of CONFIG_32BIT guoren
2023-11-12 6:15 ` [RFC PATCH V2 36/38] irqchip: " guoren
2023-11-12 6:15 ` [RFC PATCH V2 37/38] add tinylab defconfig guoren
2023-11-12 6:15 ` [RFC PATCH V2 38/38] 64ilp32 v.s. 64lp64 guoren
2023-11-13 4:13 ` [RFC PATCH V2 00/38] rv64ilp32: Running ILP32 on RV64 ISA Guo Ren
2023-11-13 4:22 ` Guo Ren
2023-12-03 15:31 ` Guo Ren
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