public inbox for linux-arch@vger.kernel.org
 help / color / mirror / Atom feed
From: guoren@kernel.org
To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com,
	tglx@linutronix.de, conor.dooley@microchip.com, heiko@sntech.de,
	apatel@ventanamicro.com, atishp@atishpatra.org, bjorn@kernel.org,
	paul.walmsley@sifive.com, anup@brainfault.org,
	jiawei@iscas.ac.cn, liweiwei@iscas.ac.cn, wefu@redhat.com,
	U2FsdGVkX1@gmail.com, wangjunqiang@iscas.ac.cn,
	kito.cheng@sifive.com, andy.chiu@sifive.com,
	vincent.chen@sifive.com, greentime.hu@sifive.com,
	wuwei2016@iscas.ac.cn, jrtc27@jrtc27.com, luto@kernel.org,
	fweimer@redhat.com, catalin.marinas@arm.com, hjl.tools@gmail.com
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	Guo Ren <guoren@linux.alibaba.com>
Subject: [RFC PATCH V2 24/38] riscv: s64ilp32: Add TImode (128 int) support
Date: Sun, 12 Nov 2023 01:15:00 -0500	[thread overview]
Message-ID: <20231112061514.2306187-25-guoren@kernel.org> (raw)
In-Reply-To: <20231112061514.2306187-1-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

The s64ilp32 uses 64bit compiler, so it could support “Tetra
Integer” mode, which represents a sixteen-byte (128) integer.

It's the first 32BIT linux support TImode :)

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
---
 arch/riscv/Kconfig      | 1 +
 arch/riscv/lib/Makefile | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 0fc03aa076e6..a45e31ef3b2c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -339,6 +339,7 @@ config ARCH_RV64I
 config ARCH_RV64ILP32
 	bool "RV64ILP32"
 	depends on NONPORTABLE
+	select ARCH_SUPPORTS_INT128 if !$(cc-option,$(m64-flag) -D__SIZEOF_INT128__=0)
 	select 32BIT
 	select MMU
 	select VDSO64ILP32
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 26cb2502ecf8..68af463795e1 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -9,5 +9,6 @@ lib-y			+= strncmp.o
 lib-$(CONFIG_MMU)	+= uaccess.o
 lib-$(CONFIG_64BIT)	+= tishift.o
 lib-$(CONFIG_RISCV_ISA_ZICBOZ)	+= clear_page.o
+lib-$(CONFIG_ARCH_RV64ILP32) += tishift.o
 
 obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o
-- 
2.36.1


  parent reply	other threads:[~2023-11-12  6:17 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-12  6:14 [RFC PATCH V2 00/38] rv64ilp32: Running ILP32 on RV64 ISA guoren
2023-11-12  6:14 ` [RFC PATCH V2 01/38] riscv: u64ilp32: Unify vdso32 & compat_vdso into vdso/Makefile guoren
2023-11-12  6:14 ` [RFC PATCH V2 02/38] riscv: u64ilp32: Remove compat_vdso/ guoren
2023-11-12  6:14 ` [RFC PATCH V2 03/38] riscv: u64ilp32: Add time-related vDSO common flow for vdso32 guoren
2023-11-12  6:14 ` [RFC PATCH V2 04/38] riscv: u64ilp32: Introduce ILP32 vdso for UXL=64 guoren
2023-11-12  6:14 ` [RFC PATCH V2 05/38] riscv: u64ilp32: Adjust vDSO kernel flow for 64ilp32 abi guoren
2023-11-12  6:14 ` [RFC PATCH V2 06/38] riscv: u64ilp32: Add signal support for compat guoren
2023-11-12  6:14 ` [RFC PATCH V2 07/38] riscv: u64ilp32: Add ptrace interface support guoren
2023-11-12  6:14 ` [RFC PATCH V2 08/38] riscv: u64ilp32: Adjust vDSO alternative for 64ilp32 abi guoren
2023-11-12  6:14 ` [RFC PATCH V2 09/38] riscv: u64ilp32: Add xlen_t in user_regs_struct guoren
2023-11-12  6:14 ` [RFC PATCH V2 10/38] riscv: u64ilp32: Remove the restriction of UXL=32 guoren
2023-11-12  6:14 ` [RFC PATCH V2 11/38] riscv: u64ilp32: Enable user space runtime switch guoren
2023-11-12  6:14 ` [RFC PATCH V2 12/38] riscv: s64ilp32: Unify ULL & UL into UXL in csr guoren
2023-11-12  6:14 ` [RFC PATCH V2 13/38] riscv: s64ilp32: Introduce xlen_t for 64ILP32 kernel guoren
2023-11-12  6:14 ` [RFC PATCH V2 14/38] riscv: s64ilp32: Add sbi support guoren
2023-11-12  6:14 ` [RFC PATCH V2 15/38] riscv: s64ilp32: Add asid support guoren
2023-11-12  6:14 ` [RFC PATCH V2 16/38] riscv: s64ilp32: Introduce PTR_L and PTR_S guoren
2023-11-12  6:14 ` [RFC PATCH V2 17/38] riscv: s64ilp32: Adjust TASK_SIZE for s64ilp32 kernel guoren
2023-11-12  6:14 ` [RFC PATCH V2 18/38] riscv: s64ilp32: Add ebpf jit support guoren
2023-11-12  6:14 ` [RFC PATCH V2 19/38] riscv: s64ilp32: Add ELF32 support guoren
2023-11-12  6:14 ` [RFC PATCH V2 20/38] riscv: s64ilp32: Add ARCH_RV64ILP32 Kconfig option guoren
2023-11-12  6:14 ` [RFC PATCH V2 21/38] riscv: s64ilp32: Add MMU_SV32 mode support guoren
2023-11-12  6:14 ` [RFC PATCH V2 22/38] riscv: s64ilp32: Add MMU_SV39 " guoren
2023-11-12  6:14 ` [RFC PATCH V2 23/38] riscv: s64ilp32: Enable native atomic64 guoren
2023-11-12  6:15 ` guoren [this message]
2023-11-12  6:15 ` [RFC PATCH V2 25/38] riscv: s64ilp32: Implement cmpxchg_double guoren
2023-11-12  6:15 ` [RFC PATCH V2 26/38] riscv: s64ilp32: Disable KVM guoren
2023-11-12  6:15 ` [RFC PATCH V2 27/38] riscv: s64ilp32: Correct the rv64ilp32 stackframe layout guoren
2023-11-12  6:15 ` [RFC PATCH V2 28/38] riscv: s64ilp32: Temporary workaround solution to gcc problem guoren
2023-11-12  6:15 ` [RFC PATCH V2 29/38] riscv: s64ilp32: Introduce ARCH_HAS_64ILP32_KERNEL for syscall guoren
2023-11-12  6:15 ` [RFC PATCH V2 30/38] riscv: s64ilp32: Add u32ilp32 ptrace support guoren
2023-11-12  6:15 ` [RFC PATCH V2 31/38] riscv: s64ilp32: Add u32ilp32 signal support guoren
2023-11-12  6:15 ` [RFC PATCH V2 32/38] riscv: s64ilp32: Validate harts by architecture name guoren
2023-11-12  6:15 ` [RFC PATCH V2 33/38] riscv: s64ilp32: Add rv64ilp32_defconfig guoren
2023-11-12  6:15 ` [RFC PATCH V2 34/38] riscv: Cleanup rv32_defconfig guoren
2023-11-12  6:15 ` [RFC PATCH V2 35/38] clocksource: riscv: s64ilp32: Use __riscv_xlen instead of CONFIG_32BIT guoren
2023-11-12  6:15 ` [RFC PATCH V2 36/38] irqchip: " guoren
2023-11-12  6:15 ` [RFC PATCH V2 37/38] add tinylab defconfig guoren
2023-11-12  6:15 ` [RFC PATCH V2 38/38] 64ilp32 v.s. 64lp64 guoren
2023-11-13  4:13 ` [RFC PATCH V2 00/38] rv64ilp32: Running ILP32 on RV64 ISA Guo Ren
2023-11-13  4:22 ` Guo Ren
2023-12-03 15:31 ` Guo Ren

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231112061514.2306187-25-guoren@kernel.org \
    --to=guoren@kernel.org \
    --cc=U2FsdGVkX1@gmail.com \
    --cc=andy.chiu@sifive.com \
    --cc=anup@brainfault.org \
    --cc=apatel@ventanamicro.com \
    --cc=arnd@arndb.de \
    --cc=atishp@atishpatra.org \
    --cc=bjorn@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=conor.dooley@microchip.com \
    --cc=fweimer@redhat.com \
    --cc=greentime.hu@sifive.com \
    --cc=guoren@linux.alibaba.com \
    --cc=heiko@sntech.de \
    --cc=hjl.tools@gmail.com \
    --cc=jiawei@iscas.ac.cn \
    --cc=jrtc27@jrtc27.com \
    --cc=kito.cheng@sifive.com \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=liweiwei@iscas.ac.cn \
    --cc=luto@kernel.org \
    --cc=palmer@rivosinc.com \
    --cc=paul.walmsley@sifive.com \
    --cc=tglx@linutronix.de \
    --cc=vincent.chen@sifive.com \
    --cc=wangjunqiang@iscas.ac.cn \
    --cc=wefu@redhat.com \
    --cc=wuwei2016@iscas.ac.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox