From: Andrew Jones <ajones@ventanamicro.com>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Andrea Parri <parri.andrea@gmail.com>,
Nathan Chancellor <nathan@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>, Will Deacon <will@kernel.org>,
Waiman Long <longman@redhat.com>,
Boqun Feng <boqun.feng@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Leonardo Bras <leobras@redhat.com>, Guo Ren <guoren@kernel.org>,
linux-doc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-arch@vger.kernel.org
Subject: Re: [PATCH v5 11/13] riscv: Add ISA extension parsing for Ziccrse
Date: Wed, 21 Aug 2024 16:33:42 +0200 [thread overview]
Message-ID: <20240821-c0a013faab7e36290a658543@orel> (raw)
In-Reply-To: <20240818063538.6651-12-alexghiti@rivosinc.com>
On Sun, Aug 18, 2024 at 08:35:36AM GMT, Alexandre Ghiti wrote:
> Add support to parse the Ziccrse string in the riscv,isa string.
>
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> ---
> arch/riscv/include/asm/hwcap.h | 1 +
> arch/riscv/kernel/cpufeature.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index f5d53251c947..9e228b079a6d 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -93,6 +93,7 @@
> #define RISCV_ISA_EXT_ZCMOP 84
> #define RISCV_ISA_EXT_ZAWRS 85
> #define RISCV_ISA_EXT_ZABHA 86
> +#define RISCV_ISA_EXT_ZICCRSE 87
>
> #define RISCV_ISA_EXT_XLINUXENVCFG 127
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 67ebcc4c9424..ea9c255bbe3d 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -314,6 +314,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
> riscv_ext_zicbom_validate),
> __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts,
> riscv_ext_zicboz_validate),
> + __RISCV_ISA_EXT_DATA(ziccrse, RISCV_ISA_EXT_ZICCRSE),
> __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR),
> __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND),
> __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR),
> --
> 2.39.2
>
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
next prev parent reply other threads:[~2024-08-21 14:33 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-18 6:35 [PATCH v5 00/13] Zacas/Zabha support and qspinlocks Alexandre Ghiti
2024-08-18 6:35 ` [PATCH v5 01/13] riscv: Move cpufeature.h macros into their own header Alexandre Ghiti
2024-08-18 6:35 ` [PATCH v5 02/13] riscv: Do not fail to build on byte/halfword operations with Zawrs Alexandre Ghiti
2024-08-21 14:11 ` Andrew Jones
2024-08-18 6:35 ` [PATCH v5 03/13] riscv: Implement cmpxchg32/64() using Zacas Alexandre Ghiti
2024-08-18 6:35 ` [PATCH v5 04/13] dt-bindings: riscv: Add Zabha ISA extension description Alexandre Ghiti
2024-08-21 14:16 ` Andrew Jones
2024-08-18 6:35 ` [PATCH v5 05/13] riscv: Implement cmpxchg8/16() using Zabha Alexandre Ghiti
2024-08-18 6:35 ` [PATCH v5 06/13] riscv: Improve zacas fully-ordered cmpxchg() Alexandre Ghiti
2024-08-21 14:26 ` Andrew Jones
2024-08-18 6:35 ` [PATCH v5 07/13] riscv: Implement arch_cmpxchg128() using Zacas Alexandre Ghiti
2024-08-18 6:35 ` [PATCH v5 08/13] riscv: Implement xchg8/16() using Zabha Alexandre Ghiti
2024-08-18 6:35 ` [PATCH v5 09/13] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock Alexandre Ghiti
2024-08-21 14:28 ` Andrew Jones
2024-08-18 6:35 ` [PATCH v5 10/13] asm-generic: ticket-lock: Add separate ticket-lock.h Alexandre Ghiti
2024-08-21 14:32 ` Andrew Jones
2024-08-18 6:35 ` [PATCH v5 11/13] riscv: Add ISA extension parsing for Ziccrse Alexandre Ghiti
2024-08-21 14:33 ` Andrew Jones [this message]
2024-08-18 6:35 ` [PATCH v5 12/13] dt-bindings: riscv: Add Ziccrse ISA extension description Alexandre Ghiti
2024-08-18 22:40 ` Conor Dooley
2024-08-21 14:35 ` Andrew Jones
2024-08-18 6:35 ` [PATCH v5 13/13] riscv: Add qspinlock support Alexandre Ghiti
2024-08-21 14:51 ` Andrew Jones
2024-08-28 8:16 ` Alexandre Ghiti
2024-08-28 9:06 ` Andrew Jones
2024-11-13 15:12 ` [PATCH v5 00/13] Zacas/Zabha support and qspinlocks patchwork-bot+linux-riscv
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