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X-CSE-ConnectionGUID: MOggi4BHRLiBwcWJ1t1VRg== X-CSE-MsgGUID: yQOBikyfSnq+HHysc3PPHg== X-IronPort-AV: E=Sophos;i="6.12,192,1728975600"; d="asc'?scan'208";a="266088084" X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 28 Nov 2024 07:15:53 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 28 Nov 2024 07:15:23 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Thu, 28 Nov 2024 07:15:20 -0700 Date: Thu, 28 Nov 2024 14:14:53 +0000 From: Conor Dooley To: Will Deacon CC: Alexandre Ghiti , Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Andrea Parri , Nathan Chancellor , Peter Zijlstra , Ingo Molnar , Waiman Long , Boqun Feng , Arnd Bergmann , Leonardo Bras , Guo Ren , , , , , Subject: Re: [PATCH v6 13/13] riscv: Add qspinlock support Message-ID: <20241128-uncivil-removed-4e105d1397c9@wendy> References: <20241103145153.105097-1-alexghiti@rivosinc.com> <20241103145153.105097-14-alexghiti@rivosinc.com> <20241128-whoever-wildfire-2a3110c5fd46@wendy> <20241128134135.GA3460@willie-the-truck> Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="WBb/bzqDVTuERqKU" Content-Disposition: inline In-Reply-To: <20241128134135.GA3460@willie-the-truck> --WBb/bzqDVTuERqKU Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Nov 28, 2024 at 01:41:36PM +0000, Will Deacon wrote: > On Thu, Nov 28, 2024 at 12:56:55PM +0000, Conor Dooley wrote: > > On Sun, Nov 03, 2024 at 03:51:53PM +0100, Alexandre Ghiti wrote: > > > In order to produce a generic kernel, a user can select > > > CONFIG_COMBO_SPINLOCKS which will fallback at runtime to the ticket > > > spinlock implementation if Zabha or Ziccrse are not present. > > >=20 > > > Note that we can't use alternatives here because the discovery of > > > extensions is done too late and we need to start with the qspinlock > > > implementation because the ticket spinlock implementation would pollu= te > > > the spinlock value, so let's use static keys. > > >=20 > > > This is largely based on Guo's work and Leonardo reviews at [1]. > > >=20 > > > Link: https://lore.kernel.org/linux-riscv/20231225125847.2778638-1-gu= oren@kernel.org/ [1] > > > Signed-off-by: Guo Ren > > > Signed-off-by: Alexandre Ghiti > >=20 > > This patch (now commit ab83647fadae2 ("riscv: Add qspinlock support")) > > breaks boot on polarfire soc. It dies before outputting anything to the > > console. My .config has: > >=20 > > # CONFIG_RISCV_TICKET_SPINLOCKS is not set > > # CONFIG_RISCV_QUEUED_SPINLOCKS is not set > > CONFIG_RISCV_COMBO_SPINLOCKS=3Dy >=20 > I pointed out some of the fragility during review: >=20 > https://lore.kernel.org/all/20241111164259.GA20042@willie-the-truck/ >=20 > so I'm kinda surprised it got merged tbh :/ Maybe it could be reverted rather than having a broken boot with the default settings in -rc1. --WBb/bzqDVTuERqKU Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZ0h63AAKCRB4tDGHoIJi 0qcjAQD1VYmRXRcmpfuKUiWAY8RvBFgoztaYktfbFy6aNPK3AQD+L2DsgGtQap0l /O61BvSrFDF+EyAogkoxnnR8R5f2Ag8= =tGkt -----END PGP SIGNATURE----- --WBb/bzqDVTuERqKU--