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Sat, 26 Jul 2025 06:42:52 -0700 (PDT) Received: from ubuntu-Virtual-Machine.corp.microsoft.com ([2001:4898:80e8:77:9619:11b0:a73:e5a6]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-31e83508500sm1869190a91.22.2025.07.26.06.42.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Jul 2025 06:42:52 -0700 (PDT) From: Tianyu Lan To: kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, arnd@arndb.de, Neeraj.Upadhyay@amd.com, kvijayab@amd.com Cc: Tianyu Lan , linux-arch@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH V4 0/4] x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform Date: Sat, 26 Jul 2025 09:42:46 -0400 Message-Id: <20250726134250.4414-1-ltykernel@gmail.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Tianyu Lan Secure AVIC is a new hardware feature in the AMD64 architecture to allow SEV-SNP guests to prevent the hypervisor from generating unexpected interrupts to a vCPU or otherwise violate architectural assumptions around APIC behavior. Each vCPU has a guest-allocated APIC backing page of size 4K, which maintains APIC state for that vCPU. APIC backing page's ALLOWED_IRR field indicates the interrupt vectors which the guest allows the hypervisor to send. This patchset is to enable the feature for Hyper-V platform. Patch "Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V" is to expose new fucntion hv_enable_coco_interrupt() and device driver and arch code may update AVIC backing page ALLOWED_IRR field to allow Hyper-V inject associated vector. This patchset is based on the AMD patchset "AMD: Add Secure AVIC Guest Support" https://lkml.org/lkml/2025/6/10/1579 Chnage since v3: - Disable VMBus Message interrupt via hv_enable_ coco_interrupt() in the hv_synic_disable_regs(). - Fix coding style issue and update change log. Change since v2: - Add hv_enable_coco_interrupt() as wrapper of apic_update_vector() - Re-work change logs Change since v1: - Remove the check of Secure AVIC when set APIC backing page - Use apic_update_vector() instead of exposing new interface from Secure AVIC driver to update APIC backing page and allow associated interrupt to be injected by hypervisor. Tianyu Lan (4): x86/hyperv: Don't use hv apic driver when Secure AVIC is available drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V x86/hyperv: Don't use auto-eoi when Secure AVIC is available x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts arch/x86/hyperv/hv_apic.c | 8 ++++++++ arch/x86/hyperv/hv_init.c | 7 +++++++ arch/x86/kernel/cpu/mshyperv.c | 2 ++ drivers/hv/hv.c | 2 ++ drivers/hv/hv_common.c | 5 +++++ include/asm-generic/mshyperv.h | 1 + 6 files changed, 25 insertions(+) -- 2.25.1