* [PATCH v2 1/6] x86/hyperv: Rename guest crash shutdown function
2025-09-23 21:46 [PATCH v2 0/6] Hyper-V: Implement hypervisor core collection Mukesh Rathor
@ 2025-09-23 21:46 ` Mukesh Rathor
2025-09-23 21:46 ` [PATCH v2 2/6] hyperv: Add two new hypercall numbers to guest ABI public header Mukesh Rathor
` (4 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Mukesh Rathor @ 2025-09-23 21:46 UTC (permalink / raw)
To: linux-hyperv, linux-kernel, linux-arch
Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
hpa, arnd
Rename hv_machine_crash_shutdown to more appropriate
hv_guest_crash_shutdown and make it applicable to guests only. This
in preparation for the subsequent hypervisor root/dom0 crash support
patches.
Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
---
arch/x86/kernel/cpu/mshyperv.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 25773af116bc..1c6ec9b6107f 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -219,7 +219,7 @@ static void hv_machine_shutdown(void)
#endif /* CONFIG_KEXEC_CORE */
#ifdef CONFIG_CRASH_DUMP
-static void hv_machine_crash_shutdown(struct pt_regs *regs)
+static void hv_guest_crash_shutdown(struct pt_regs *regs)
{
if (hv_crash_handler)
hv_crash_handler(regs);
@@ -562,7 +562,8 @@ static void __init ms_hyperv_init_platform(void)
machine_ops.shutdown = hv_machine_shutdown;
#endif
#if defined(CONFIG_CRASH_DUMP)
- machine_ops.crash_shutdown = hv_machine_crash_shutdown;
+ if (!hv_root_partition())
+ machine_ops.crash_shutdown = hv_guest_crash_shutdown;
#endif
#endif
/*
--
2.36.1.vfs.0.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v2 2/6] hyperv: Add two new hypercall numbers to guest ABI public header
2025-09-23 21:46 [PATCH v2 0/6] Hyper-V: Implement hypervisor core collection Mukesh Rathor
2025-09-23 21:46 ` [PATCH v2 1/6] x86/hyperv: Rename guest crash shutdown function Mukesh Rathor
@ 2025-09-23 21:46 ` Mukesh Rathor
2025-09-23 21:46 ` [PATCH v2 3/6] hyperv: Add definitions for hypervisor crash dump support Mukesh Rathor
` (3 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Mukesh Rathor @ 2025-09-23 21:46 UTC (permalink / raw)
To: linux-hyperv, linux-kernel, linux-arch
Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
hpa, arnd
In preparation for the subsequent crashdump patches, copy two hypercall
numbers to the guest ABI header published by Hyper-V. One to notify
hypervisor of an event that occurs in the root partition, other to ask
hypervisor to disable the hypervisor.
Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
---
include/hyperv/hvgdk_mini.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/hyperv/hvgdk_mini.h b/include/hyperv/hvgdk_mini.h
index 1be7f6a02304..5441bf47059a 100644
--- a/include/hyperv/hvgdk_mini.h
+++ b/include/hyperv/hvgdk_mini.h
@@ -469,6 +469,7 @@ union hv_vp_assist_msr_contents { /* HV_REGISTER_VP_ASSIST_PAGE */
#define HVCALL_MAP_DEVICE_INTERRUPT 0x007c
#define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d
#define HVCALL_RETARGET_INTERRUPT 0x007e
+#define HVCALL_NOTIFY_PARTITION_EVENT 0x0087
#define HVCALL_NOTIFY_PORT_RING_EMPTY 0x008b
#define HVCALL_REGISTER_INTERCEPT_RESULT 0x0091
#define HVCALL_ASSERT_VIRTUAL_INTERRUPT 0x0094
@@ -492,6 +493,7 @@ union hv_vp_assist_msr_contents { /* HV_REGISTER_VP_ASSIST_PAGE */
#define HVCALL_GET_VP_CPUID_VALUES 0x00f4
#define HVCALL_MMIO_READ 0x0106
#define HVCALL_MMIO_WRITE 0x0107
+#define HVCALL_DISABLE_HYP_EX 0x010f
/* HV_HYPERCALL_INPUT */
#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
--
2.36.1.vfs.0.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v2 3/6] hyperv: Add definitions for hypervisor crash dump support
2025-09-23 21:46 [PATCH v2 0/6] Hyper-V: Implement hypervisor core collection Mukesh Rathor
2025-09-23 21:46 ` [PATCH v2 1/6] x86/hyperv: Rename guest crash shutdown function Mukesh Rathor
2025-09-23 21:46 ` [PATCH v2 2/6] hyperv: Add two new hypercall numbers to guest ABI public header Mukesh Rathor
@ 2025-09-23 21:46 ` Mukesh Rathor
2025-09-23 21:46 ` [PATCH v2 4/6] x86/hyperv: Add trampoline asm code to transition from hypervisor Mukesh Rathor
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Mukesh Rathor @ 2025-09-23 21:46 UTC (permalink / raw)
To: linux-hyperv, linux-kernel, linux-arch
Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
hpa, arnd
Add data structures for hypervisor crash dump support to the hypervisor
host ABI header file. Details of their usages are in subsequent commits.
Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
---
include/hyperv/hvhdk_mini.h | 55 +++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/include/hyperv/hvhdk_mini.h b/include/hyperv/hvhdk_mini.h
index 858f6a3925b3..ad9a8048fb4e 100644
--- a/include/hyperv/hvhdk_mini.h
+++ b/include/hyperv/hvhdk_mini.h
@@ -116,6 +116,17 @@ enum hv_system_property {
/* Add more values when needed */
HV_SYSTEM_PROPERTY_SCHEDULER_TYPE = 15,
HV_DYNAMIC_PROCESSOR_FEATURE_PROPERTY = 21,
+ HV_SYSTEM_PROPERTY_CRASHDUMPAREA = 47,
+};
+
+#define HV_PFN_RANGE_PGBITS 24 /* HV_SPA_PAGE_RANGE_ADDITIONAL_PAGES_BITS */
+union hv_pfn_range { /* HV_SPA_PAGE_RANGE */
+ u64 as_uint64;
+ struct {
+ /* 39:0: base pfn. 63:40: additional pages */
+ u64 base_pfn : 64 - HV_PFN_RANGE_PGBITS;
+ u64 add_pfns : HV_PFN_RANGE_PGBITS;
+ } __packed;
};
enum hv_dynamic_processor_feature_property {
@@ -142,6 +153,8 @@ struct hv_output_get_system_property {
#if IS_ENABLED(CONFIG_X86)
u64 hv_processor_feature_value;
#endif
+ union hv_pfn_range hv_cda_info; /* CrashdumpAreaAddress */
+ u64 hv_tramp_pa; /* CrashdumpTrampolineAddress */
};
} __packed;
@@ -234,6 +247,48 @@ union hv_gpa_page_access_state {
u8 as_uint8;
} __packed;
+enum hv_crashdump_action {
+ HV_CRASHDUMP_NONE = 0,
+ HV_CRASHDUMP_SUSPEND_ALL_VPS,
+ HV_CRASHDUMP_PREPARE_FOR_STATE_SAVE,
+ HV_CRASHDUMP_STATE_SAVED,
+ HV_CRASHDUMP_ENTRY,
+};
+
+struct hv_partition_event_root_crashdump_input {
+ u32 crashdump_action; /* enum hv_crashdump_action */
+} __packed;
+
+struct hv_input_disable_hyp_ex { /* HV_X64_INPUT_DISABLE_HYPERVISOR_EX */
+ u64 rip;
+ u64 arg;
+} __packed;
+
+struct hv_crashdump_area { /* HV_CRASHDUMP_AREA */
+ u32 version;
+ union {
+ u32 flags_as_uint32;
+ struct {
+ u32 cda_valid : 1;
+ u32 cda_unused : 31;
+ } __packed;
+ };
+ /* more unused fields */
+} __packed;
+
+union hv_partition_event_input {
+ struct hv_partition_event_root_crashdump_input crashdump_input;
+};
+
+enum hv_partition_event {
+ HV_PARTITION_EVENT_ROOT_CRASHDUMP = 2,
+};
+
+struct hv_input_notify_partition_event {
+ u32 event; /* enum hv_partition_event */
+ union hv_partition_event_input input;
+} __packed;
+
struct hv_lp_startup_status {
u64 hv_status;
u64 substatus1;
--
2.36.1.vfs.0.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v2 4/6] x86/hyperv: Add trampoline asm code to transition from hypervisor
2025-09-23 21:46 [PATCH v2 0/6] Hyper-V: Implement hypervisor core collection Mukesh Rathor
` (2 preceding siblings ...)
2025-09-23 21:46 ` [PATCH v2 3/6] hyperv: Add definitions for hypervisor crash dump support Mukesh Rathor
@ 2025-09-23 21:46 ` Mukesh Rathor
2025-10-01 6:00 ` Wei Liu
2025-09-23 21:46 ` [PATCH v2 5/6] x86/hyperv: Implement hypervisor RAM collection into vmcore Mukesh Rathor
2025-09-23 21:46 ` [PATCH v2 6/6] x86/hyperv: Enable build of hypervisor crashdump collection files Mukesh Rathor
5 siblings, 1 reply; 12+ messages in thread
From: Mukesh Rathor @ 2025-09-23 21:46 UTC (permalink / raw)
To: linux-hyperv, linux-kernel, linux-arch
Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
hpa, arnd
Introduce a small asm stub to transition from the hypervisor to Linux
after devirtualization. Devirtualization means disabling hypervisor on
the fly, so after it is done, the code is running on physical processor
instead of virtual, and hypervisor is gone. This can be done by a
root/dom0 vm only.
At a high level, during panic of either the hypervisor or the dom0 (aka
root), the NMI handler asks hypervisor to devirtualize. As part of that,
the arguments include an entry point to return back to Linux. This asm
stub implements that entry point.
The stub is entered in protected mode, uses temporary gdt and page table
to enable long mode and get to kernel entry point which then restores full
kernel context to resume execution to kexec.
Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
---
arch/x86/hyperv/hv_trampoline.S | 101 ++++++++++++++++++++++++++++++++
1 file changed, 101 insertions(+)
create mode 100644 arch/x86/hyperv/hv_trampoline.S
diff --git a/arch/x86/hyperv/hv_trampoline.S b/arch/x86/hyperv/hv_trampoline.S
new file mode 100644
index 000000000000..25f02ff12286
--- /dev/null
+++ b/arch/x86/hyperv/hv_trampoline.S
@@ -0,0 +1,101 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * X86 specific Hyper-V kdump/crash related code.
+ *
+ * Copyright (C) 2025, Microsoft, Inc.
+ *
+ */
+#include <linux/linkage.h>
+#include <asm/alternative.h>
+#include <asm/msr.h>
+#include <asm/processor-flags.h>
+#include <asm/nospec-branch.h>
+
+/*
+ * void noreturn hv_crash_asm32(arg1)
+ * arg1 == edi == 32bit PA of struct hv_crash_tramp_data
+ *
+ * The hypervisor jumps here upon devirtualization in protected mode. This
+ * code gets copied to a page in the low 4G ie, 32bit space so it can run
+ * in the protected mode. Hence we cannot use any compile/link time offsets or
+ * addresses. It restores long mode via temporary gdt and page tables and
+ * eventually jumps to kernel code entry at HV_CRASHDATA_OFFS_C_entry.
+ *
+ * PreCondition (ie, Hypervisor call back ABI):
+ * o CR0 is set to 0x0021: PE(prot mode) and NE are set, paging is disabled
+ * o CR4 is set to 0x0
+ * o IA32_EFER is set to 0x901 (SCE and NXE are set)
+ * o EDI is set to the Arg passed to HVCALL_DISABLE_HYP_EX.
+ * o CS, DS, ES, FS, GS are all initialized with a base of 0 and limit 0xFFFF
+ * o IDTR, TR and GDTR are initialized with a base of 0 and limit of 0xFFFF
+ * o LDTR is initialized as invalid (limit of 0)
+ * o MSR PAT is power on default.
+ * o Other state/registers are cleared. All TLBs flushed.
+ */
+
+#define HV_CRASHDATA_OFFS_TRAMPCR3 0x0 /* 0 */
+#define HV_CRASHDATA_OFFS_KERNCR3 0x8 /* 8 */
+#define HV_CRASHDATA_OFFS_GDTRLIMIT 0x12 /* 18 */
+#define HV_CRASHDATA_OFFS_CS_JMPTGT 0x28 /* 40 */
+#define HV_CRASHDATA_OFFS_C_entry 0x30 /* 48 */
+
+ .text
+ .code32
+
+SYM_CODE_START(hv_crash_asm32)
+ UNWIND_HINT_UNDEFINED
+ ENDBR
+ movl $X86_CR4_PAE, %ecx
+ movl %ecx, %cr4
+
+ movl %edi, %ebx
+ add $HV_CRASHDATA_OFFS_TRAMPCR3, %ebx
+ movl %cs:(%ebx), %eax
+ movl %eax, %cr3
+
+ /* Setup EFER for long mode now */
+ movl $MSR_EFER, %ecx
+ rdmsr
+ btsl $_EFER_LME, %eax
+ wrmsr
+
+ /* Turn paging on using the temp 32bit trampoline page table */
+ movl %cr0, %eax
+ orl $(X86_CR0_PG), %eax
+ movl %eax, %cr0
+
+ /* since kernel cr3 could be above 4G, we need to be in the long mode
+ * before we can load 64bits of the kernel cr3. We use a temp gdt for
+ * that with CS.L=1 and CS.D=0 */
+ mov %edi, %eax
+ add $HV_CRASHDATA_OFFS_GDTRLIMIT, %eax
+ lgdtl %cs:(%eax)
+
+ /* not done yet, restore CS now to switch to CS.L=1 */
+ mov %edi, %eax
+ add $HV_CRASHDATA_OFFS_CS_JMPTGT, %eax
+ ljmp %cs:*(%eax)
+SYM_CODE_END(hv_crash_asm32)
+
+ /* we now run in full 64bit IA32-e long mode, CS.L=1 and CS.D=0 */
+ .code64
+ .balign 8
+SYM_CODE_START(hv_crash_asm64)
+ UNWIND_HINT_UNDEFINED
+ ENDBR
+ /* restore kernel page tables so we can jump to kernel code */
+ mov %edi, %eax
+ add $HV_CRASHDATA_OFFS_KERNCR3, %eax
+ movq %cs:(%eax), %rbx
+ movq %rbx, %cr3
+
+ mov %edi, %eax
+ add $HV_CRASHDATA_OFFS_C_entry, %eax
+ movq %cs:(%eax), %rbx
+ ANNOTATE_RETPOLINE_SAFE
+ jmp *%rbx
+
+ int $3
+
+SYM_INNER_LABEL(hv_crash_asm_end, SYM_L_GLOBAL)
+SYM_CODE_END(hv_crash_asm64)
--
2.36.1.vfs.0.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v2 4/6] x86/hyperv: Add trampoline asm code to transition from hypervisor
2025-09-23 21:46 ` [PATCH v2 4/6] x86/hyperv: Add trampoline asm code to transition from hypervisor Mukesh Rathor
@ 2025-10-01 6:00 ` Wei Liu
2025-10-01 21:07 ` Mukesh R
0 siblings, 1 reply; 12+ messages in thread
From: Wei Liu @ 2025-10-01 6:00 UTC (permalink / raw)
To: Mukesh Rathor
Cc: linux-hyperv, linux-kernel, linux-arch, kys, haiyangz, wei.liu,
decui, tglx, mingo, bp, dave.hansen, x86, hpa, arnd
On Tue, Sep 23, 2025 at 02:46:07PM -0700, Mukesh Rathor wrote:
> Introduce a small asm stub to transition from the hypervisor to Linux
> after devirtualization. Devirtualization means disabling hypervisor on
> the fly, so after it is done, the code is running on physical processor
> instead of virtual, and hypervisor is gone. This can be done by a
> root/dom0 vm only.
I want to scrub "dom0" from comments and commit messages. We drew
parallels to Xen when we first wrote this code, but it's not a useful
term externally. "root" or "root partition" should be sufficient.
>
> At a high level, during panic of either the hypervisor or the dom0 (aka
> root), the NMI handler asks hypervisor to devirtualize. As part of that,
> the arguments include an entry point to return back to Linux. This asm
> stub implements that entry point.
>
> The stub is entered in protected mode, uses temporary gdt and page table
> to enable long mode and get to kernel entry point which then restores full
> kernel context to resume execution to kexec.
>
> Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
> ---
> arch/x86/hyperv/hv_trampoline.S | 101 ++++++++++++++++++++++++++++++++
> 1 file changed, 101 insertions(+)
> create mode 100644 arch/x86/hyperv/hv_trampoline.S
>
> diff --git a/arch/x86/hyperv/hv_trampoline.S b/arch/x86/hyperv/hv_trampoline.S
> new file mode 100644
> index 000000000000..25f02ff12286
> --- /dev/null
> +++ b/arch/x86/hyperv/hv_trampoline.S
> @@ -0,0 +1,101 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * X86 specific Hyper-V kdump/crash related code.
> + *
> + * Copyright (C) 2025, Microsoft, Inc.
> + *
> + */
> +#include <linux/linkage.h>
> +#include <asm/alternative.h>
> +#include <asm/msr.h>
> +#include <asm/processor-flags.h>
> +#include <asm/nospec-branch.h>
> +
> +/*
> + * void noreturn hv_crash_asm32(arg1)
> + * arg1 == edi == 32bit PA of struct hv_crash_tramp_data
> + *
> + * The hypervisor jumps here upon devirtualization in protected mode. This
> + * code gets copied to a page in the low 4G ie, 32bit space so it can run
> + * in the protected mode. Hence we cannot use any compile/link time offsets or
> + * addresses. It restores long mode via temporary gdt and page tables and
> + * eventually jumps to kernel code entry at HV_CRASHDATA_OFFS_C_entry.
> + *
> + * PreCondition (ie, Hypervisor call back ABI):
> + * o CR0 is set to 0x0021: PE(prot mode) and NE are set, paging is disabled
> + * o CR4 is set to 0x0
> + * o IA32_EFER is set to 0x901 (SCE and NXE are set)
> + * o EDI is set to the Arg passed to HVCALL_DISABLE_HYP_EX.
> + * o CS, DS, ES, FS, GS are all initialized with a base of 0 and limit 0xFFFF
> + * o IDTR, TR and GDTR are initialized with a base of 0 and limit of 0xFFFF
> + * o LDTR is initialized as invalid (limit of 0)
> + * o MSR PAT is power on default.
> + * o Other state/registers are cleared. All TLBs flushed.
> + */
> +
> +#define HV_CRASHDATA_OFFS_TRAMPCR3 0x0 /* 0 */
> +#define HV_CRASHDATA_OFFS_KERNCR3 0x8 /* 8 */
> +#define HV_CRASHDATA_OFFS_GDTRLIMIT 0x12 /* 18 */
> +#define HV_CRASHDATA_OFFS_CS_JMPTGT 0x28 /* 40 */
> +#define HV_CRASHDATA_OFFS_C_entry 0x30 /* 48 */
> +
> + .text
> + .code32
> +
I recently learned that instrumentation may be problematic for context
switching code. I have not studied this code and noinstr usage in tree
extensively so cannot make a judgement here.
It is worth checking out the recent discussion on the VTL transition
code.
https://lore.kernel.org/linux-hyperv/27e50bb7-7f0e-48fb-bdbc-6c6d606e7113@redhat.com/
And check out the in-tree document Documentation/core-api/entry.rst.
Wei
> +SYM_CODE_START(hv_crash_asm32)
> + UNWIND_HINT_UNDEFINED
> + ENDBR
> + movl $X86_CR4_PAE, %ecx
> + movl %ecx, %cr4
> +
> + movl %edi, %ebx
> + add $HV_CRASHDATA_OFFS_TRAMPCR3, %ebx
> + movl %cs:(%ebx), %eax
> + movl %eax, %cr3
> +
> + /* Setup EFER for long mode now */
> + movl $MSR_EFER, %ecx
> + rdmsr
> + btsl $_EFER_LME, %eax
> + wrmsr
> +
> + /* Turn paging on using the temp 32bit trampoline page table */
> + movl %cr0, %eax
> + orl $(X86_CR0_PG), %eax
> + movl %eax, %cr0
> +
> + /* since kernel cr3 could be above 4G, we need to be in the long mode
> + * before we can load 64bits of the kernel cr3. We use a temp gdt for
> + * that with CS.L=1 and CS.D=0 */
> + mov %edi, %eax
> + add $HV_CRASHDATA_OFFS_GDTRLIMIT, %eax
> + lgdtl %cs:(%eax)
> +
> + /* not done yet, restore CS now to switch to CS.L=1 */
> + mov %edi, %eax
> + add $HV_CRASHDATA_OFFS_CS_JMPTGT, %eax
> + ljmp %cs:*(%eax)
> +SYM_CODE_END(hv_crash_asm32)
> +
> + /* we now run in full 64bit IA32-e long mode, CS.L=1 and CS.D=0 */
> + .code64
> + .balign 8
> +SYM_CODE_START(hv_crash_asm64)
> + UNWIND_HINT_UNDEFINED
> + ENDBR
> + /* restore kernel page tables so we can jump to kernel code */
> + mov %edi, %eax
> + add $HV_CRASHDATA_OFFS_KERNCR3, %eax
> + movq %cs:(%eax), %rbx
> + movq %rbx, %cr3
> +
> + mov %edi, %eax
> + add $HV_CRASHDATA_OFFS_C_entry, %eax
> + movq %cs:(%eax), %rbx
> + ANNOTATE_RETPOLINE_SAFE
> + jmp *%rbx
> +
> + int $3
> +
> +SYM_INNER_LABEL(hv_crash_asm_end, SYM_L_GLOBAL)
> +SYM_CODE_END(hv_crash_asm64)
> --
> 2.36.1.vfs.0.0
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 4/6] x86/hyperv: Add trampoline asm code to transition from hypervisor
2025-10-01 6:00 ` Wei Liu
@ 2025-10-01 21:07 ` Mukesh R
0 siblings, 0 replies; 12+ messages in thread
From: Mukesh R @ 2025-10-01 21:07 UTC (permalink / raw)
To: Wei Liu
Cc: linux-hyperv, linux-kernel, linux-arch, kys, haiyangz, decui,
tglx, mingo, bp, dave.hansen, x86, hpa, arnd
On 9/30/25 23:00, Wei Liu wrote:
> On Tue, Sep 23, 2025 at 02:46:07PM -0700, Mukesh Rathor wrote:
>> Introduce a small asm stub to transition from the hypervisor to Linux
>> after devirtualization. Devirtualization means disabling hypervisor on
>> the fly, so after it is done, the code is running on physical processor
>> instead of virtual, and hypervisor is gone. This can be done by a
>> root/dom0 vm only.
>
> I want to scrub "dom0" from comments and commit messages. We drew
> parallels to Xen when we first wrote this code, but it's not a useful
> term externally. "root" or "root partition" should be sufficient.
>
>>
>> At a high level, during panic of either the hypervisor or the dom0 (aka
>> root), the NMI handler asks hypervisor to devirtualize. As part of that,
>> the arguments include an entry point to return back to Linux. This asm
>> stub implements that entry point.
>>
>> The stub is entered in protected mode, uses temporary gdt and page table
>> to enable long mode and get to kernel entry point which then restores full
>> kernel context to resume execution to kexec.
>>
>> Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
>> ---
>> arch/x86/hyperv/hv_trampoline.S | 101 ++++++++++++++++++++++++++++++++
>> 1 file changed, 101 insertions(+)
>> create mode 100644 arch/x86/hyperv/hv_trampoline.S
>>
>> diff --git a/arch/x86/hyperv/hv_trampoline.S b/arch/x86/hyperv/hv_trampoline.S
>> new file mode 100644
>> index 000000000000..25f02ff12286
>> --- /dev/null
>> +++ b/arch/x86/hyperv/hv_trampoline.S
>> @@ -0,0 +1,101 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * X86 specific Hyper-V kdump/crash related code.
>> + *
>> + * Copyright (C) 2025, Microsoft, Inc.
>> + *
>> + */
>> +#include <linux/linkage.h>
>> +#include <asm/alternative.h>
>> +#include <asm/msr.h>
>> +#include <asm/processor-flags.h>
>> +#include <asm/nospec-branch.h>
>> +
>> +/*
>> + * void noreturn hv_crash_asm32(arg1)
>> + * arg1 == edi == 32bit PA of struct hv_crash_tramp_data
>> + *
>> + * The hypervisor jumps here upon devirtualization in protected mode. This
>> + * code gets copied to a page in the low 4G ie, 32bit space so it can run
>> + * in the protected mode. Hence we cannot use any compile/link time offsets or
>> + * addresses. It restores long mode via temporary gdt and page tables and
>> + * eventually jumps to kernel code entry at HV_CRASHDATA_OFFS_C_entry.
>> + *
>> + * PreCondition (ie, Hypervisor call back ABI):
>> + * o CR0 is set to 0x0021: PE(prot mode) and NE are set, paging is disabled
>> + * o CR4 is set to 0x0
>> + * o IA32_EFER is set to 0x901 (SCE and NXE are set)
>> + * o EDI is set to the Arg passed to HVCALL_DISABLE_HYP_EX.
>> + * o CS, DS, ES, FS, GS are all initialized with a base of 0 and limit 0xFFFF
>> + * o IDTR, TR and GDTR are initialized with a base of 0 and limit of 0xFFFF
>> + * o LDTR is initialized as invalid (limit of 0)
>> + * o MSR PAT is power on default.
>> + * o Other state/registers are cleared. All TLBs flushed.
>> + */
>> +
>> +#define HV_CRASHDATA_OFFS_TRAMPCR3 0x0 /* 0 */
>> +#define HV_CRASHDATA_OFFS_KERNCR3 0x8 /* 8 */
>> +#define HV_CRASHDATA_OFFS_GDTRLIMIT 0x12 /* 18 */
>> +#define HV_CRASHDATA_OFFS_CS_JMPTGT 0x28 /* 40 */
>> +#define HV_CRASHDATA_OFFS_C_entry 0x30 /* 48 */
>> +
>> + .text
>> + .code32
>> +
>
> I recently learned that instrumentation may be problematic for context
> switching code. I have not studied this code and noinstr usage in tree
> extensively so cannot make a judgement here.
>
> It is worth checking out the recent discussion on the VTL transition
> code.
>
> https://lore.kernel.org/linux-hyperv/27e50bb7-7f0e-48fb-bdbc-6c6d606e7113@redhat.com/
>
> And check out the in-tree document Documentation/core-api/entry.rst.
Thanks, we should be ok here because this is actually copied to another
below 4G page for protected mode transfer. It is then executed from there,
and not the default section it is linked in. For example,
arch/x86/kernel/relocate_kernel_64.S
does not have .noinstr.
Thanks,
-Mukesh
> Wei
>
>> +SYM_CODE_START(hv_crash_asm32)
>> + UNWIND_HINT_UNDEFINED
>> + ENDBR
>> + movl $X86_CR4_PAE, %ecx
>> + movl %ecx, %cr4
>> +
>> + movl %edi, %ebx
>> + add $HV_CRASHDATA_OFFS_TRAMPCR3, %ebx
>> + movl %cs:(%ebx), %eax
>> + movl %eax, %cr3
>> +
>> + /* Setup EFER for long mode now */
>> + movl $MSR_EFER, %ecx
>> + rdmsr
>> + btsl $_EFER_LME, %eax
>> + wrmsr
>> +
>> + /* Turn paging on using the temp 32bit trampoline page table */
>> + movl %cr0, %eax
>> + orl $(X86_CR0_PG), %eax
>> + movl %eax, %cr0
>> +
>> + /* since kernel cr3 could be above 4G, we need to be in the long mode
>> + * before we can load 64bits of the kernel cr3. We use a temp gdt for
>> + * that with CS.L=1 and CS.D=0 */
>> + mov %edi, %eax
>> + add $HV_CRASHDATA_OFFS_GDTRLIMIT, %eax
>> + lgdtl %cs:(%eax)
>> +
>> + /* not done yet, restore CS now to switch to CS.L=1 */
>> + mov %edi, %eax
>> + add $HV_CRASHDATA_OFFS_CS_JMPTGT, %eax
>> + ljmp %cs:*(%eax)
>> +SYM_CODE_END(hv_crash_asm32)
>> +
>> + /* we now run in full 64bit IA32-e long mode, CS.L=1 and CS.D=0 */
>> + .code64
>> + .balign 8
>> +SYM_CODE_START(hv_crash_asm64)
>> + UNWIND_HINT_UNDEFINED
>> + ENDBR
>> + /* restore kernel page tables so we can jump to kernel code */
>> + mov %edi, %eax
>> + add $HV_CRASHDATA_OFFS_KERNCR3, %eax
>> + movq %cs:(%eax), %rbx
>> + movq %rbx, %cr3
>> +
>> + mov %edi, %eax
>> + add $HV_CRASHDATA_OFFS_C_entry, %eax
>> + movq %cs:(%eax), %rbx
>> + ANNOTATE_RETPOLINE_SAFE
>> + jmp *%rbx
>> +
>> + int $3
>> +
>> +SYM_INNER_LABEL(hv_crash_asm_end, SYM_L_GLOBAL)
>> +SYM_CODE_END(hv_crash_asm64)
>> --
>> 2.36.1.vfs.0.0
>>
>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 5/6] x86/hyperv: Implement hypervisor RAM collection into vmcore
2025-09-23 21:46 [PATCH v2 0/6] Hyper-V: Implement hypervisor core collection Mukesh Rathor
` (3 preceding siblings ...)
2025-09-23 21:46 ` [PATCH v2 4/6] x86/hyperv: Add trampoline asm code to transition from hypervisor Mukesh Rathor
@ 2025-09-23 21:46 ` Mukesh Rathor
2025-10-02 21:42 ` Wei Liu
2025-09-23 21:46 ` [PATCH v2 6/6] x86/hyperv: Enable build of hypervisor crashdump collection files Mukesh Rathor
5 siblings, 1 reply; 12+ messages in thread
From: Mukesh Rathor @ 2025-09-23 21:46 UTC (permalink / raw)
To: linux-hyperv, linux-kernel, linux-arch
Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
hpa, arnd
Introduce a new file to implement collection of hypervisor RAM into the
vmcore collected by linux. By default, the hypervisor RAM is locked, ie,
protected via hw page table. Hyper-V implements a disable hypercall which
essentially devirtualizes the system on the fly. This mechanism makes the
hypervisor RAM accessible to linux. Because the hypervisor RAM is already
mapped into linux address space (as reserved RAM), it is automatically
collected into the vmcore without extra work. More details of the
implementation are available in the file prologue.
Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
---
arch/x86/hyperv/hv_crash.c | 642 +++++++++++++++++++++++++++++++++++++
1 file changed, 642 insertions(+)
create mode 100644 arch/x86/hyperv/hv_crash.c
diff --git a/arch/x86/hyperv/hv_crash.c b/arch/x86/hyperv/hv_crash.c
new file mode 100644
index 000000000000..3fe1dd2a3d39
--- /dev/null
+++ b/arch/x86/hyperv/hv_crash.c
@@ -0,0 +1,642 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * X86 specific Hyper-V root/dom0 partition kdump/crash support module
+ *
+ * Copyright (C) 2025, Microsoft, Inc.
+ *
+ * This module implements hypervisor RAM collection into vmcore for both
+ * cases of the hypervisor crash and Linux dom0/root crash. Hyper-V implements
+ * a disable hypercall with a 32bit protected mode ABI callback. This
+ * mechanism must be used to unlock hypervisor RAM. Since the hypervisor RAM
+ * is already mapped in Linux, it is automatically collected into Linux vmcore,
+ * and can be examined by the crash command (raw RAM dump) or windbg.
+ *
+ * At a high level:
+ *
+ * Hypervisor Crash:
+ * Upon crash, hypervisor goes into an emergency minimal dispatch loop, a
+ * restrictive mode with very limited hypercall and MSR support. Each cpu
+ * then injects NMIs into dom0/root vcpus. A shared page is used to check
+ * by Linux in the NMI handler if the hypervisor has crashed. This shared
+ * page is setup in hv_root_crash_init during boot.
+ *
+ * Linux Crash:
+ * In case of Linux crash, the callback hv_crash_stop_other_cpus will send
+ * NMIs to all cpus, then proceed to the crash_nmi_callback where it waits
+ * for all cpus to be in NMI.
+ *
+ * NMI Handler (upon quorum):
+ * Eventually, in both cases, all cpus will end up in the NMI handler.
+ * Hyper-V requires the disable hypervisor must be done from the BSP. So
+ * the BSP NMI handler saves current context, does some fixups and makes
+ * the hypercall to disable the hypervisor, ie, devirtualize. Hypervisor
+ * at that point will suspend all vcpus (except the BSP), unlock all its
+ * RAM, and return to Linux at the 32bit mode entry RIP.
+ *
+ * Linux 32bit entry trampoline will then restore long mode and call C
+ * function here to restore context and continue execution to crash kexec.
+ */
+
+#include <linux/delay.h>
+#include <linux/kexec.h>
+#include <linux/crash_dump.h>
+#include <linux/panic.h>
+#include <asm/apic.h>
+#include <asm/desc.h>
+#include <asm/page.h>
+#include <asm/pgalloc.h>
+#include <asm/mshyperv.h>
+#include <asm/nmi.h>
+#include <asm/idtentry.h>
+#include <asm/reboot.h>
+#include <asm/intel_pt.h>
+
+bool hv_crash_enabled;
+EXPORT_SYMBOL_GPL(hv_crash_enabled);
+
+struct hv_crash_ctxt {
+ ulong rsp;
+ ulong cr0;
+ ulong cr2;
+ ulong cr4;
+ ulong cr8;
+
+ u16 cs;
+ u16 ss;
+ u16 ds;
+ u16 es;
+ u16 fs;
+ u16 gs;
+
+ u16 gdt_fill;
+ struct desc_ptr gdtr;
+ char idt_fill[6];
+ struct desc_ptr idtr;
+
+ u64 gsbase;
+ u64 efer;
+ u64 pat;
+};
+static struct hv_crash_ctxt hv_crash_ctxt;
+
+/* Shared hypervisor page that contains crash dump area we peek into.
+ * NB: windbg looks for "hv_cda" symbol so don't change it.
+ */
+static struct hv_crashdump_area *hv_cda;
+
+static u32 trampoline_pa, devirt_arg;
+static atomic_t crash_cpus_wait;
+static void *hv_crash_ptpgs[4];
+static bool hv_has_crashed, lx_has_crashed;
+
+static void __noreturn hv_panic_timeout_reboot(void)
+{
+ #define PANIC_TIMER_STEP 100
+
+ if (panic_timeout > 0) {
+ int i;
+
+ for (i = 0; i < panic_timeout * 1000; i += PANIC_TIMER_STEP)
+ mdelay(PANIC_TIMER_STEP);
+ }
+
+ if (panic_timeout)
+ native_wrmsrq(HV_X64_MSR_RESET, 1); /* get hyp to reboot */
+
+ for (;;)
+ cpu_relax();
+}
+
+/* This cannot be inlined as it needs stack */
+static noinline __noclone void hv_crash_restore_tss(void)
+{
+ load_TR_desc();
+}
+
+/* This cannot be inlined as it needs stack */
+static noinline void hv_crash_clear_kernpt(void)
+{
+ pgd_t *pgd;
+ p4d_t *p4d;
+
+ /* Clear entry so it's not confusing to someone looking at the core */
+ pgd = pgd_offset_k(trampoline_pa);
+ p4d = p4d_offset(pgd, trampoline_pa);
+ native_p4d_clear(p4d);
+}
+
+/*
+ * This is the C entry point from the asm glue code after the devirt hypercall.
+ * We enter here in IA32-e long mode, ie, full 64bit mode running on kernel
+ * page tables with our below 4G page identity mapped, but using a temporary
+ * GDT. ds/fs/gs/es are null. ss is not usable. bp is null. stack is not
+ * available. We restore kernel GDT, and rest of the context, and continue
+ * to kexec.
+ */
+static asmlinkage void __noreturn hv_crash_c_entry(void)
+{
+ struct hv_crash_ctxt *ctxt = &hv_crash_ctxt;
+
+ /* first thing, restore kernel gdt */
+ native_load_gdt(&ctxt->gdtr);
+
+ asm volatile("movw %%ax, %%ss" : : "a"(ctxt->ss));
+ asm volatile("movq %0, %%rsp" : : "m"(ctxt->rsp));
+
+ asm volatile("movw %%ax, %%ds" : : "a"(ctxt->ds));
+ asm volatile("movw %%ax, %%es" : : "a"(ctxt->es));
+ asm volatile("movw %%ax, %%fs" : : "a"(ctxt->fs));
+ asm volatile("movw %%ax, %%gs" : : "a"(ctxt->gs));
+
+ native_wrmsrq(MSR_IA32_CR_PAT, ctxt->pat);
+ asm volatile("movq %0, %%cr0" : : "r"(ctxt->cr0));
+
+ asm volatile("movq %0, %%cr8" : : "r"(ctxt->cr8));
+ asm volatile("movq %0, %%cr4" : : "r"(ctxt->cr4));
+ asm volatile("movq %0, %%cr2" : : "r"(ctxt->cr4));
+
+ native_load_idt(&ctxt->idtr);
+ native_wrmsrq(MSR_GS_BASE, ctxt->gsbase);
+ native_wrmsrq(MSR_EFER, ctxt->efer);
+
+ /* restore the original kernel CS now via far return */
+ asm volatile("movzwq %0, %%rax\n\t"
+ "pushq %%rax\n\t"
+ "pushq $1f\n\t"
+ "lretq\n\t"
+ "1:nop\n\t" : : "m"(ctxt->cs) : "rax");
+
+ /* We are in asmlinkage without stack frame, hence make C function
+ * calls which will buy stack frames.
+ */
+ hv_crash_restore_tss();
+ hv_crash_clear_kernpt();
+
+ /* we are now fully in devirtualized normal kernel mode */
+ __crash_kexec(NULL);
+
+ hv_panic_timeout_reboot();
+}
+/* Tell gcc we are using lretq long jump in the above function intentionally */
+STACK_FRAME_NON_STANDARD(hv_crash_c_entry);
+
+static void hv_mark_tss_not_busy(void)
+{
+ struct desc_struct *desc = get_current_gdt_rw();
+ tss_desc tss;
+
+ memcpy(&tss, &desc[GDT_ENTRY_TSS], sizeof(tss_desc));
+ tss.type = 0x9; /* available 64-bit TSS. 0xB is busy TSS */
+ write_gdt_entry(desc, GDT_ENTRY_TSS, &tss, DESC_TSS);
+}
+
+/* Save essential context */
+static void hv_hvcrash_ctxt_save(void)
+{
+ struct hv_crash_ctxt *ctxt = &hv_crash_ctxt;
+
+ asm volatile("movq %%rsp,%0" : "=m"(ctxt->rsp));
+
+ ctxt->cr0 = native_read_cr0();
+ ctxt->cr4 = native_read_cr4();
+
+ asm volatile("movq %%cr2, %0" : "=a"(ctxt->cr2));
+ asm volatile("movq %%cr8, %0" : "=a"(ctxt->cr8));
+
+ asm volatile("movl %%cs, %%eax" : "=a"(ctxt->cs));
+ asm volatile("movl %%ss, %%eax" : "=a"(ctxt->ss));
+ asm volatile("movl %%ds, %%eax" : "=a"(ctxt->ds));
+ asm volatile("movl %%es, %%eax" : "=a"(ctxt->es));
+ asm volatile("movl %%fs, %%eax" : "=a"(ctxt->fs));
+ asm volatile("movl %%gs, %%eax" : "=a"(ctxt->gs));
+
+ native_store_gdt(&ctxt->gdtr);
+ store_idt(&ctxt->idtr);
+
+ ctxt->gsbase = __rdmsr(MSR_GS_BASE);
+ ctxt->efer = __rdmsr(MSR_EFER);
+ ctxt->pat = __rdmsr(MSR_IA32_CR_PAT);
+}
+
+/* Add trampoline page to the kernel pagetable for transition to kernel PT */
+static void hv_crash_fixup_kernpt(void)
+{
+ pgd_t *pgd;
+ p4d_t *p4d;
+
+ pgd = pgd_offset_k(trampoline_pa);
+ p4d = p4d_offset(pgd, trampoline_pa);
+
+ /* trampoline_pa is below 4G, so no pre-existing entry to clobber */
+ p4d_populate(&init_mm, p4d, (pud_t *)hv_crash_ptpgs[1]);
+ p4d->p4d = p4d->p4d & ~(_PAGE_NX); /* enable execute */
+}
+
+/*
+ * Notify the hyp that Linux has crashed. This will cause the hyp to quiesce
+ * and suspend all guest VPs.
+ */
+static void hv_notify_prepare_hyp(void)
+{
+ u64 status;
+ struct hv_input_notify_partition_event *input;
+ struct hv_partition_event_root_crashdump_input *cda;
+
+ input = *this_cpu_ptr(hyperv_pcpu_input_arg);
+ cda = &input->input.crashdump_input;
+ memset(input, 0, sizeof(*input));
+ input->event = HV_PARTITION_EVENT_ROOT_CRASHDUMP;
+
+ cda->crashdump_action = HV_CRASHDUMP_ENTRY;
+ status = hv_do_hypercall(HVCALL_NOTIFY_PARTITION_EVENT, input, NULL);
+ if (!hv_result_success(status))
+ return;
+
+ cda->crashdump_action = HV_CRASHDUMP_SUSPEND_ALL_VPS;
+ hv_do_hypercall(HVCALL_NOTIFY_PARTITION_EVENT, input, NULL);
+}
+
+/*
+ * Common function for all cpus before devirtualization.
+ *
+ * Hypervisor crash: all cpus get here in NMI context.
+ * Linux crash: the panicing cpu gets here at base level, all others in NMI
+ * context. Note, panicing cpu may not be the BSP.
+ *
+ * The function is not inlined so it will show on the stack. It is named so
+ * because the crash cmd looks for certain well known function names on the
+ * stack before looking into the cpu saved note in the elf section, and
+ * that work is currently incomplete.
+ *
+ * Notes:
+ * Hypervisor crash:
+ * - the hypervisor is in a very restrictive mode at this point and any
+ * vmexit it cannot handle would result in reboot. So, no mumbo jumbo,
+ * just get to kexec as quickly as possible.
+ *
+ * Devirtualization is supported from the BSP only at present.
+ */
+static noinline __noclone void crash_nmi_callback(struct pt_regs *regs)
+{
+ struct hv_input_disable_hyp_ex *input;
+ u64 status;
+ int msecs = 1000, ccpu = smp_processor_id();
+
+ if (ccpu == 0) {
+ /* crash_save_cpu() will be done in the kexec path */
+ cpu_emergency_stop_pt(); /* disable performance trace */
+ atomic_inc(&crash_cpus_wait);
+ } else {
+ crash_save_cpu(regs, ccpu);
+ cpu_emergency_stop_pt(); /* disable performance trace */
+ atomic_inc(&crash_cpus_wait);
+ for (;;)
+ cpu_relax();
+ }
+
+ while (atomic_read(&crash_cpus_wait) < num_online_cpus() && msecs--)
+ mdelay(1);
+
+ stop_nmi();
+ if (!hv_has_crashed)
+ hv_notify_prepare_hyp();
+
+ if (crashing_cpu == -1)
+ crashing_cpu = ccpu; /* crash cmd uses this */
+
+ hv_hvcrash_ctxt_save();
+ hv_mark_tss_not_busy();
+ hv_crash_fixup_kernpt();
+
+ input = *this_cpu_ptr(hyperv_pcpu_input_arg);
+ memset(input, 0, sizeof(*input));
+ input->rip = trampoline_pa;
+ input->arg = devirt_arg;
+
+ status = hv_do_hypercall(HVCALL_DISABLE_HYP_EX, input, NULL);
+
+ hv_panic_timeout_reboot();
+}
+
+
+static DEFINE_SPINLOCK(hv_crash_reboot_lk);
+
+/*
+ * Generic NMI callback handler: could be called without any crash also.
+ * hv crash: hypervisor injects NMI's into all cpus
+ * lx crash: panicing cpu sends NMI to all but self via crash_stop_other_cpus
+ */
+static int hv_crash_nmi_local(unsigned int cmd, struct pt_regs *regs)
+{
+ if (!hv_has_crashed && hv_cda && hv_cda->cda_valid)
+ hv_has_crashed = true;
+
+ if (!hv_has_crashed && !lx_has_crashed)
+ return NMI_DONE; /* ignore the NMI */
+
+ if (hv_has_crashed && !kexec_crash_loaded()) {
+ if (spin_trylock(&hv_crash_reboot_lk))
+ hv_panic_timeout_reboot();
+ else
+ for (;;)
+ cpu_relax();
+ }
+
+ crash_nmi_callback(regs);
+
+ return NMI_DONE;
+}
+
+/*
+ * hv_crash_stop_other_cpus() == smp_ops.crash_stop_other_cpus
+ *
+ * On normal Linux panic, this is called twice: first from panic and then again
+ * from native_machine_crash_shutdown.
+ *
+ * In case of hyperv, 3 ways to get here:
+ * 1. hv crash (only BSP will get here):
+ * BSP : NMI callback -> DisableHv -> hv_crash_asm32 -> hv_crash_c_entry
+ * -> __crash_kexec -> native_machine_crash_shutdown
+ * -> crash_smp_send_stop -> smp_ops.crash_stop_other_cpus
+ * Linux panic:
+ * 2. panic cpu x: panic() -> crash_smp_send_stop
+ * -> smp_ops.crash_stop_other_cpus
+ * 3. BSP: native_machine_crash_shutdown -> crash_smp_send_stop
+ *
+ * NB: noclone and non standard stack because of call to crash_setup_regs().
+ */
+static void __noclone hv_crash_stop_other_cpus(void)
+{
+ static bool crash_stop_done;
+ struct pt_regs lregs;
+ int ccpu = smp_processor_id();
+
+ if (hv_has_crashed)
+ return; /* all cpus already in NMI handler path */
+
+ if (!kexec_crash_loaded()) {
+ hv_notify_prepare_hyp();
+ hv_panic_timeout_reboot(); /* no return */
+ }
+
+ /* If hyp crashes also, we could come here again before cpus_stopped is
+ * set in crash_smp_send_stop(). So use our own check.
+ */
+ if (crash_stop_done)
+ return;
+ crash_stop_done = true;
+
+ /* Linux has crashed: hv is healthy, we can ipi safely */
+ lx_has_crashed = true;
+ wmb(); /* NMI handlers look at lx_has_crashed */
+
+ apic->send_IPI_allbutself(NMI_VECTOR);
+
+ if (crashing_cpu == -1)
+ crashing_cpu = ccpu; /* crash cmd uses this */
+
+ /* crash_setup_regs() happens in kexec also, but for the kexec cpu which
+ * is the BSP. We could be here on non-BSP cpu, collect regs if so.
+ */
+ if (ccpu)
+ crash_setup_regs(&lregs, NULL);
+
+ crash_nmi_callback(&lregs);
+}
+STACK_FRAME_NON_STANDARD(hv_crash_stop_other_cpus);
+
+/* This GDT is accessed in IA32-e compat mode which uses 32bits addresses */
+struct hv_gdtreg_32 {
+ u16 fill;
+ u16 limit;
+ u32 address;
+} __packed;
+
+/* We need a CS with L bit to goto IA32-e long mode from 32bit compat mode */
+struct hv_crash_tramp_gdt {
+ u64 null; /* index 0, selector 0, null selector */
+ u64 cs64; /* index 1, selector 8, cs64 selector */
+} __packed;
+
+/* No stack, so jump via far ptr in memory to load the 64bit CS */
+struct hv_cs_jmptgt {
+ u32 address;
+ u16 csval;
+ u16 fill;
+} __packed;
+
+/* Linux use only, hypervisor doesn't look at this struct */
+struct hv_crash_tramp_data {
+ u64 tramp32_cr3;
+ u64 kernel_cr3;
+ struct hv_gdtreg_32 gdtr32;
+ struct hv_crash_tramp_gdt tramp_gdt;
+ struct hv_cs_jmptgt cs_jmptgt;
+ u64 c_entry_addr;
+} __packed;
+
+/*
+ * Setup a temporary gdt to allow the asm code to switch to the long mode.
+ * Since the asm code is relocated/copied to a below 4G page, it cannot use rip
+ * relative addressing, hence we must use trampoline_pa here. Also, save other
+ * info like jmp and C entry targets for same reasons.
+ *
+ * Returns: 0 on success, -1 on error
+ */
+static int hv_crash_setup_trampdata(u64 trampoline_va)
+{
+ int size, offs;
+ void *dest;
+ struct hv_crash_tramp_data *tramp;
+
+ /* These must match exactly the ones in the corresponding asm file */
+ BUILD_BUG_ON(offsetof(struct hv_crash_tramp_data, tramp32_cr3) != 0);
+ BUILD_BUG_ON(offsetof(struct hv_crash_tramp_data, kernel_cr3) != 8);
+ BUILD_BUG_ON(offsetof(struct hv_crash_tramp_data, gdtr32.limit) != 18);
+ BUILD_BUG_ON(offsetof(struct hv_crash_tramp_data,
+ cs_jmptgt.address) != 40);
+ BUILD_BUG_ON(offsetof(struct hv_crash_tramp_data, c_entry_addr) != 48);
+
+ /* hv_crash_asm_end is beyond last byte by 1 */
+ size = &hv_crash_asm_end - &hv_crash_asm32;
+ if (size + sizeof(struct hv_crash_tramp_data) > PAGE_SIZE) {
+ pr_err("%s: trampoline page overflow\n", __func__);
+ return -1;
+ }
+
+ dest = (void *)trampoline_va;
+ memcpy(dest, &hv_crash_asm32, size);
+
+ dest += size;
+ dest = (void *)round_up((ulong)dest, 16);
+ tramp = (struct hv_crash_tramp_data *)dest;
+
+ /* see MAX_ASID_AVAILABLE in tlb.c: "PCID 0 is reserved for use by
+ * non-PCID-aware users". Build cr3 with pcid 0
+ */
+ tramp->tramp32_cr3 = __sme_pa(hv_crash_ptpgs[0]);
+
+ /* Note, when restoring X86_CR4_PCIDE, cr3[11:0] must be zero */
+ tramp->kernel_cr3 = __sme_pa(init_mm.pgd);
+
+ tramp->gdtr32.limit = sizeof(struct hv_crash_tramp_gdt);
+ tramp->gdtr32.address = trampoline_pa +
+ (ulong)&tramp->tramp_gdt - trampoline_va;
+
+ /* base:0 limit:0xfffff type:b dpl:0 P:1 L:1 D:0 avl:0 G:1 */
+ tramp->tramp_gdt.cs64 = 0x00af9a000000ffff;
+
+ tramp->cs_jmptgt.csval = 0x8;
+ offs = (ulong)&hv_crash_asm64 - (ulong)&hv_crash_asm32;
+ tramp->cs_jmptgt.address = trampoline_pa + offs;
+
+ tramp->c_entry_addr = (u64)&hv_crash_c_entry;
+
+ devirt_arg = trampoline_pa + (ulong)dest - trampoline_va;
+
+ return 0;
+}
+
+/*
+ * Build 32bit trampoline page table for transition from protected mode
+ * non-paging to long-mode paging. This transition needs pagetables below 4G.
+ */
+static void hv_crash_build_tramp_pt(void)
+{
+ p4d_t *p4d;
+ pud_t *pud;
+ pmd_t *pmd;
+ pte_t *pte;
+ u64 pa, addr = trampoline_pa;
+
+ p4d = hv_crash_ptpgs[0] + pgd_index(addr) * sizeof(p4d);
+ pa = virt_to_phys(hv_crash_ptpgs[1]);
+ set_p4d(p4d, __p4d(_PAGE_TABLE | pa));
+ p4d->p4d &= ~(_PAGE_NX); /* enable execute */
+
+ pud = hv_crash_ptpgs[1] + pud_index(addr) * sizeof(pud);
+ pa = virt_to_phys(hv_crash_ptpgs[2]);
+ set_pud(pud, __pud(_PAGE_TABLE | pa));
+
+ pmd = hv_crash_ptpgs[2] + pmd_index(addr) * sizeof(pmd);
+ pa = virt_to_phys(hv_crash_ptpgs[3]);
+ set_pmd(pmd, __pmd(_PAGE_TABLE | pa));
+
+ pte = hv_crash_ptpgs[3] + pte_index(addr) * sizeof(pte);
+ set_pte(pte, pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_EXEC));
+}
+
+/*
+ * Setup trampoline for devirtualization:
+ * - a page below 4G, ie 32bit addr containing asm glue code that hyp jmps to
+ * in protected mode.
+ * - 4 pages for a temporary page table that asm code uses to turn paging on
+ * - a temporary gdt to use in the compat mode.
+ *
+ * Returns: 0 on success
+ */
+static int hv_crash_trampoline_setup(void)
+{
+ int i, rc, order;
+ struct page *page;
+ u64 trampoline_va;
+ gfp_t flags32 = GFP_KERNEL | GFP_DMA32 | __GFP_ZERO;
+
+ /* page for 32bit trampoline assembly code + hv_crash_tramp_data */
+ page = alloc_page(flags32);
+ if (page == NULL) {
+ pr_err("%s: failed to alloc asm stub page\n", __func__);
+ return -1;
+ }
+
+ trampoline_va = (u64)page_to_virt(page);
+ trampoline_pa = (u32)page_to_phys(page);
+
+ order = 2; /* alloc 2^2 pages */
+ page = alloc_pages(flags32, order);
+ if (page == NULL) {
+ pr_err("%s: failed to alloc pt pages\n", __func__);
+ free_page(trampoline_va);
+ return -1;
+ }
+
+ for (i = 0; i < 4; i++, page++)
+ hv_crash_ptpgs[i] = page_to_virt(page);
+
+ hv_crash_build_tramp_pt();
+
+ rc = hv_crash_setup_trampdata(trampoline_va);
+ if (rc)
+ goto errout;
+
+ return 0;
+
+errout:
+ free_page(trampoline_va);
+ free_pages((ulong)hv_crash_ptpgs[0], order);
+
+ return rc;
+}
+
+/* Setup for kdump kexec to collect hypervisor RAM when running as root/dom0 */
+void hv_root_crash_init(void)
+{
+ int rc;
+ struct hv_input_get_system_property *input;
+ struct hv_output_get_system_property *output;
+ unsigned long flags;
+ u64 status;
+ union hv_pfn_range cda_info;
+
+ if (pgtable_l5_enabled()) {
+ pr_err("Hyper-V: crash dump not yet supported on 5level PTs\n");
+ return;
+ }
+
+ rc = register_nmi_handler(NMI_LOCAL, hv_crash_nmi_local, NMI_FLAG_FIRST,
+ "hv_crash_nmi");
+ if (rc) {
+ pr_err("Hyper-V: failed to register crash nmi handler\n");
+ return;
+ }
+
+ local_irq_save(flags);
+ input = *this_cpu_ptr(hyperv_pcpu_input_arg);
+ output = *this_cpu_ptr(hyperv_pcpu_output_arg);
+
+ memset(input, 0, sizeof(*input));
+ input->property_id = HV_SYSTEM_PROPERTY_CRASHDUMPAREA;
+
+ status = hv_do_hypercall(HVCALL_GET_SYSTEM_PROPERTY, input, output);
+ cda_info.as_uint64 = output->hv_cda_info.as_uint64;
+ local_irq_restore(flags);
+
+ if (!hv_result_success(status)) {
+ pr_err("Hyper-V: %s: property:%d %s\n", __func__,
+ input->property_id, hv_result_to_string(status));
+ goto err_out;
+ }
+
+ if (cda_info.base_pfn == 0) {
+ pr_err("Hyper-V: hypervisor crash dump area pfn is 0\n");
+ goto err_out;
+ }
+
+ hv_cda = phys_to_virt(cda_info.base_pfn << HV_HYP_PAGE_SHIFT);
+
+ rc = hv_crash_trampoline_setup();
+ if (rc)
+ goto err_out;
+
+ smp_ops.crash_stop_other_cpus = hv_crash_stop_other_cpus;
+
+ crash_kexec_post_notifiers = true;
+ hv_crash_enabled = true;
+ pr_info("Hyper-V: both linux and hyp kdump support enabled\n");
+
+ return;
+
+err_out:
+ unregister_nmi_handler(NMI_LOCAL, "hv_crash_nmi");
+ pr_err("Hyper-V: only linux (but not hyp) kdump support enabled\n");
+}
--
2.36.1.vfs.0.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v2 5/6] x86/hyperv: Implement hypervisor RAM collection into vmcore
2025-09-23 21:46 ` [PATCH v2 5/6] x86/hyperv: Implement hypervisor RAM collection into vmcore Mukesh Rathor
@ 2025-10-02 21:42 ` Wei Liu
2025-10-02 22:07 ` Mukesh R
0 siblings, 1 reply; 12+ messages in thread
From: Wei Liu @ 2025-10-02 21:42 UTC (permalink / raw)
To: Mukesh Rathor
Cc: linux-hyperv, linux-kernel, linux-arch, kys, haiyangz, wei.liu,
decui, tglx, mingo, bp, dave.hansen, x86, hpa, arnd
On Tue, Sep 23, 2025 at 02:46:08PM -0700, Mukesh Rathor wrote:
[...]
> +
> +/*
> + * This is the C entry point from the asm glue code after the devirt hypercall.
devirt -> devirtualization
> + * We enter here in IA32-e long mode, ie, full 64bit mode running on kernel
> + * page tables with our below 4G page identity mapped, but using a temporary
> + * GDT. ds/fs/gs/es are null. ss is not usable. bp is null. stack is not
> + * available. We restore kernel GDT, and rest of the context, and continue
> + * to kexec.
> + */
[...]
> +
> +static noinline __noclone void crash_nmi_callback(struct pt_regs *regs)
> +{
> + struct hv_input_disable_hyp_ex *input;
> + u64 status;
> + int msecs = 1000, ccpu = smp_processor_id();
> +
> + if (ccpu == 0) {
> + /* crash_save_cpu() will be done in the kexec path */
> + cpu_emergency_stop_pt(); /* disable performance trace */
> + atomic_inc(&crash_cpus_wait);
> + } else {
> + crash_save_cpu(regs, ccpu);
> + cpu_emergency_stop_pt(); /* disable performance trace */
> + atomic_inc(&crash_cpus_wait);
> + for (;;)
> + cpu_relax();
> + }
> +
> + while (atomic_read(&crash_cpus_wait) < num_online_cpus() && msecs--)
> + mdelay(1);
> +
> + stop_nmi();
> + if (!hv_has_crashed)
> + hv_notify_prepare_hyp();
> +
> + if (crashing_cpu == -1)
> + crashing_cpu = ccpu; /* crash cmd uses this */
> +
> + hv_hvcrash_ctxt_save();
> + hv_mark_tss_not_busy();
> + hv_crash_fixup_kernpt();
> +
> + input = *this_cpu_ptr(hyperv_pcpu_input_arg);
> + memset(input, 0, sizeof(*input));
> + input->rip = trampoline_pa;
> + input->arg = devirt_arg;
> +
> + status = hv_do_hypercall(HVCALL_DISABLE_HYP_EX, input, NULL);
> +
If I understand this correctly, after this call, upon return from the
hypervisor, Linux will start executing the trampoline code.
> + hv_panic_timeout_reboot();
Why is this needed? Is it to catch the case when the hypercall fails?
[...]
> +static void __noclone hv_crash_stop_other_cpus(void)
> +{
> + static bool crash_stop_done;
> + struct pt_regs lregs;
> + int ccpu = smp_processor_id();
> +
> + if (hv_has_crashed)
> + return; /* all cpus already in NMI handler path */
> +
> + if (!kexec_crash_loaded()) {
> + hv_notify_prepare_hyp();
> + hv_panic_timeout_reboot(); /* no return */
> + }
> +
> + /* If hyp crashes also, we could come here again before cpus_stopped is
hypervisor or hv (given the same term is used in the function)
> + * set in crash_smp_send_stop(). So use our own check.
> + */
> + if (crash_stop_done)
> + return;
> + crash_stop_done = true;
> +
> + /* Linux has crashed: hv is healthy, we can ipi safely */
IPI.
> +
> +err_out:
> + unregister_nmi_handler(NMI_LOCAL, "hv_crash_nmi");
> + pr_err("Hyper-V: only linux (but not hyp) kdump support enabled\n");
hypervisor not hyp. This is a message for the user so we should be as
clear as possible.
Wei
> +}
> --
> 2.36.1.vfs.0.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v2 5/6] x86/hyperv: Implement hypervisor RAM collection into vmcore
2025-10-02 21:42 ` Wei Liu
@ 2025-10-02 22:07 ` Mukesh R
0 siblings, 0 replies; 12+ messages in thread
From: Mukesh R @ 2025-10-02 22:07 UTC (permalink / raw)
To: Wei Liu
Cc: linux-hyperv, linux-kernel, linux-arch, kys, haiyangz, decui,
tglx, mingo, bp, dave.hansen, x86, hpa, arnd
On 10/2/25 14:42, Wei Liu wrote:
> On Tue, Sep 23, 2025 at 02:46:08PM -0700, Mukesh Rathor wrote:
> [...]
>> +
>> +/*
>> + * This is the C entry point from the asm glue code after the devirt hypercall.
>
> devirt -> devirtualization
>
>> + * We enter here in IA32-e long mode, ie, full 64bit mode running on kernel
>> + * page tables with our below 4G page identity mapped, but using a temporary
>> + * GDT. ds/fs/gs/es are null. ss is not usable. bp is null. stack is not
>> + * available. We restore kernel GDT, and rest of the context, and continue
>> + * to kexec.
>> + */
> [...]
>> +
>> +static noinline __noclone void crash_nmi_callback(struct pt_regs *regs)
>> +{
>> + struct hv_input_disable_hyp_ex *input;
>> + u64 status;
>> + int msecs = 1000, ccpu = smp_processor_id();
>> +
>> + if (ccpu == 0) {
>> + /* crash_save_cpu() will be done in the kexec path */
>> + cpu_emergency_stop_pt(); /* disable performance trace */
>> + atomic_inc(&crash_cpus_wait);
>> + } else {
>> + crash_save_cpu(regs, ccpu);
>> + cpu_emergency_stop_pt(); /* disable performance trace */
>> + atomic_inc(&crash_cpus_wait);
>> + for (;;)
>> + cpu_relax();
>> + }
>> +
>> + while (atomic_read(&crash_cpus_wait) < num_online_cpus() && msecs--)
>> + mdelay(1);
>> +
>> + stop_nmi();
>> + if (!hv_has_crashed)
>> + hv_notify_prepare_hyp();
>> +
>> + if (crashing_cpu == -1)
>> + crashing_cpu = ccpu; /* crash cmd uses this */
>> +
>> + hv_hvcrash_ctxt_save();
>> + hv_mark_tss_not_busy();
>> + hv_crash_fixup_kernpt();
>> +
>> + input = *this_cpu_ptr(hyperv_pcpu_input_arg);
>> + memset(input, 0, sizeof(*input));
>> + input->rip = trampoline_pa;
>> + input->arg = devirt_arg;
>> +
>> + status = hv_do_hypercall(HVCALL_DISABLE_HYP_EX, input, NULL);
>> +
>
> If I understand this correctly, after this call, upon return from the
> hypervisor, Linux will start executing the trampoline code.
correct.
>> + hv_panic_timeout_reboot();
>
> Why is this needed? Is it to catch the case when the hypercall fails?
correct.
> [...]
>> +static void __noclone hv_crash_stop_other_cpus(void)
>> +{
>> + static bool crash_stop_done;
>> + struct pt_regs lregs;
>> + int ccpu = smp_processor_id();
>> +
>> + if (hv_has_crashed)
>> + return; /* all cpus already in NMI handler path */
>> +
>> + if (!kexec_crash_loaded()) {
>> + hv_notify_prepare_hyp();
>> + hv_panic_timeout_reboot(); /* no return */
>> + }
>> +
>> + /* If hyp crashes also, we could come here again before cpus_stopped is
>
> hypervisor or hv (given the same term is used in the function)
>
>> + * set in crash_smp_send_stop(). So use our own check.
>> + */
>> + if (crash_stop_done)
>> + return;
>> + crash_stop_done = true;
>> +
>> + /* Linux has crashed: hv is healthy, we can ipi safely */
>
> IPI.
>
>> +
>> +err_out:
>> + unregister_nmi_handler(NMI_LOCAL, "hv_crash_nmi");
>> + pr_err("Hyper-V: only linux (but not hyp) kdump support enabled\n");
>
> hypervisor not hyp. This is a message for the user so we should be as
> clear as possible.
> Wei
>
>> +}
>> --
>> 2.36.1.vfs.0.0
>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 6/6] x86/hyperv: Enable build of hypervisor crashdump collection files
2025-09-23 21:46 [PATCH v2 0/6] Hyper-V: Implement hypervisor core collection Mukesh Rathor
` (4 preceding siblings ...)
2025-09-23 21:46 ` [PATCH v2 5/6] x86/hyperv: Implement hypervisor RAM collection into vmcore Mukesh Rathor
@ 2025-09-23 21:46 ` Mukesh Rathor
2025-09-24 17:07 ` kernel test robot
5 siblings, 1 reply; 12+ messages in thread
From: Mukesh Rathor @ 2025-09-23 21:46 UTC (permalink / raw)
To: linux-hyperv, linux-kernel, linux-arch
Cc: kys, haiyangz, wei.liu, decui, tglx, mingo, bp, dave.hansen, x86,
hpa, arnd
Enable build of the new files introduced in the earlier commits and add
call to do the setup during boot.
Signed-off-by: Mukesh Rathor <mrathor@linux.microsoft.com>
---
arch/x86/hyperv/Makefile | 6 ++++++
arch/x86/hyperv/hv_init.c | 1 +
arch/x86/include/asm/mshyperv.h | 13 +++++++++++++
3 files changed, 20 insertions(+)
diff --git a/arch/x86/hyperv/Makefile b/arch/x86/hyperv/Makefile
index d55f494f471d..6f5d97cddd80 100644
--- a/arch/x86/hyperv/Makefile
+++ b/arch/x86/hyperv/Makefile
@@ -5,4 +5,10 @@ obj-$(CONFIG_HYPERV_VTL_MODE) += hv_vtl.o
ifdef CONFIG_X86_64
obj-$(CONFIG_PARAVIRT_SPINLOCKS) += hv_spinlock.o
+
+ ifdef CONFIG_MSHV_ROOT
+ CFLAGS_REMOVE_hv_trampoline.o += -pg
+ CFLAGS_hv_trampoline.o += -fno-stack-protector
+ obj-$(CONFIG_CRASH_DUMP) += hv_crash.o hv_trampoline.o
+ endif
endif
diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c
index afdbda2dd7b7..577bbd143527 100644
--- a/arch/x86/hyperv/hv_init.c
+++ b/arch/x86/hyperv/hv_init.c
@@ -510,6 +510,7 @@ void __init hyperv_init(void)
memunmap(src);
hv_remap_tsc_clocksource();
+ hv_root_crash_init();
} else {
hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);
wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index abc4659f5809..207d953d7b90 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -292,6 +292,19 @@ static __always_inline u64 hv_raw_get_msr(unsigned int reg)
}
int hv_apicid_to_vp_index(u32 apic_id);
+#if IS_ENABLED(CONFIG_MSHV_ROOT)
+
+#ifdef CONFIG_CRASH_DUMP
+void hv_root_crash_init(void);
+void hv_crash_asm32(void);
+void hv_crash_asm64(void);
+void hv_crash_asm_end(void);
+#else /* CONFIG_CRASH_DUMP */
+static inline void hv_root_crash_init(void) {}
+#endif /* CONFIG_CRASH_DUMP */
+
+#endif /* CONFIG_MSHV_ROOT */
+
#else /* CONFIG_HYPERV */
static inline void hyperv_init(void) {}
static inline void hyperv_setup_mmu_ops(void) {}
--
2.36.1.vfs.0.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v2 6/6] x86/hyperv: Enable build of hypervisor crashdump collection files
2025-09-23 21:46 ` [PATCH v2 6/6] x86/hyperv: Enable build of hypervisor crashdump collection files Mukesh Rathor
@ 2025-09-24 17:07 ` kernel test robot
0 siblings, 0 replies; 12+ messages in thread
From: kernel test robot @ 2025-09-24 17:07 UTC (permalink / raw)
To: Mukesh Rathor, linux-hyperv, linux-kernel, linux-arch
Cc: llvm, oe-kbuild-all, kys, haiyangz, wei.liu, decui, tglx, mingo,
bp, dave.hansen, x86, hpa, arnd
Hi Mukesh,
kernel test robot noticed the following build errors:
[auto build test ERROR on next-20250923]
[also build test ERROR on v6.17-rc7]
[cannot apply to tip/x86/core linus/master v6.17-rc7 v6.17-rc6 v6.17-rc5]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Mukesh-Rathor/x86-hyperv-Rename-guest-crash-shutdown-function/20250924-054910
base: next-20250923
patch link: https://lore.kernel.org/r/20250923214609.4101554-7-mrathor%40linux.microsoft.com
patch subject: [PATCH v2 6/6] x86/hyperv: Enable build of hypervisor crashdump collection files
config: x86_64-randconfig-004-20250924 (https://download.01.org/0day-ci/archive/20250925/202509250034.2hNDVmj0-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250925/202509250034.2hNDVmj0-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509250034.2hNDVmj0-lkp@intel.com/
All errors (new ones prefixed by >>):
arch/x86/hyperv/hv_crash.c:282:6: warning: variable 'status' set but not used [-Wunused-but-set-variable]
282 | u64 status;
| ^
>> arch/x86/hyperv/hv_crash.c:631:2: error: must use 'struct' tag to refer to type 'smp_ops'
631 | smp_ops.crash_stop_other_cpus = hv_crash_stop_other_cpus;
| ^
| struct
>> arch/x86/hyperv/hv_crash.c:631:9: error: expected identifier or '('
631 | smp_ops.crash_stop_other_cpus = hv_crash_stop_other_cpus;
| ^
1 warning and 2 errors generated.
vim +631 arch/x86/hyperv/hv_crash.c
c619422e77519d Mukesh Rathor 2025-09-23 580
c619422e77519d Mukesh Rathor 2025-09-23 581 /* Setup for kdump kexec to collect hypervisor RAM when running as root/dom0 */
c619422e77519d Mukesh Rathor 2025-09-23 582 void hv_root_crash_init(void)
c619422e77519d Mukesh Rathor 2025-09-23 583 {
c619422e77519d Mukesh Rathor 2025-09-23 584 int rc;
c619422e77519d Mukesh Rathor 2025-09-23 585 struct hv_input_get_system_property *input;
c619422e77519d Mukesh Rathor 2025-09-23 586 struct hv_output_get_system_property *output;
c619422e77519d Mukesh Rathor 2025-09-23 587 unsigned long flags;
c619422e77519d Mukesh Rathor 2025-09-23 588 u64 status;
c619422e77519d Mukesh Rathor 2025-09-23 589 union hv_pfn_range cda_info;
c619422e77519d Mukesh Rathor 2025-09-23 590
c619422e77519d Mukesh Rathor 2025-09-23 591 if (pgtable_l5_enabled()) {
c619422e77519d Mukesh Rathor 2025-09-23 592 pr_err("Hyper-V: crash dump not yet supported on 5level PTs\n");
c619422e77519d Mukesh Rathor 2025-09-23 593 return;
c619422e77519d Mukesh Rathor 2025-09-23 594 }
c619422e77519d Mukesh Rathor 2025-09-23 595
c619422e77519d Mukesh Rathor 2025-09-23 596 rc = register_nmi_handler(NMI_LOCAL, hv_crash_nmi_local, NMI_FLAG_FIRST,
c619422e77519d Mukesh Rathor 2025-09-23 597 "hv_crash_nmi");
c619422e77519d Mukesh Rathor 2025-09-23 598 if (rc) {
c619422e77519d Mukesh Rathor 2025-09-23 599 pr_err("Hyper-V: failed to register crash nmi handler\n");
c619422e77519d Mukesh Rathor 2025-09-23 600 return;
c619422e77519d Mukesh Rathor 2025-09-23 601 }
c619422e77519d Mukesh Rathor 2025-09-23 602
c619422e77519d Mukesh Rathor 2025-09-23 603 local_irq_save(flags);
c619422e77519d Mukesh Rathor 2025-09-23 604 input = *this_cpu_ptr(hyperv_pcpu_input_arg);
c619422e77519d Mukesh Rathor 2025-09-23 605 output = *this_cpu_ptr(hyperv_pcpu_output_arg);
c619422e77519d Mukesh Rathor 2025-09-23 606
c619422e77519d Mukesh Rathor 2025-09-23 607 memset(input, 0, sizeof(*input));
c619422e77519d Mukesh Rathor 2025-09-23 608 input->property_id = HV_SYSTEM_PROPERTY_CRASHDUMPAREA;
c619422e77519d Mukesh Rathor 2025-09-23 609
c619422e77519d Mukesh Rathor 2025-09-23 610 status = hv_do_hypercall(HVCALL_GET_SYSTEM_PROPERTY, input, output);
c619422e77519d Mukesh Rathor 2025-09-23 611 cda_info.as_uint64 = output->hv_cda_info.as_uint64;
c619422e77519d Mukesh Rathor 2025-09-23 612 local_irq_restore(flags);
c619422e77519d Mukesh Rathor 2025-09-23 613
c619422e77519d Mukesh Rathor 2025-09-23 614 if (!hv_result_success(status)) {
c619422e77519d Mukesh Rathor 2025-09-23 615 pr_err("Hyper-V: %s: property:%d %s\n", __func__,
c619422e77519d Mukesh Rathor 2025-09-23 616 input->property_id, hv_result_to_string(status));
c619422e77519d Mukesh Rathor 2025-09-23 617 goto err_out;
c619422e77519d Mukesh Rathor 2025-09-23 618 }
c619422e77519d Mukesh Rathor 2025-09-23 619
c619422e77519d Mukesh Rathor 2025-09-23 620 if (cda_info.base_pfn == 0) {
c619422e77519d Mukesh Rathor 2025-09-23 621 pr_err("Hyper-V: hypervisor crash dump area pfn is 0\n");
c619422e77519d Mukesh Rathor 2025-09-23 622 goto err_out;
c619422e77519d Mukesh Rathor 2025-09-23 623 }
c619422e77519d Mukesh Rathor 2025-09-23 624
c619422e77519d Mukesh Rathor 2025-09-23 625 hv_cda = phys_to_virt(cda_info.base_pfn << HV_HYP_PAGE_SHIFT);
c619422e77519d Mukesh Rathor 2025-09-23 626
c619422e77519d Mukesh Rathor 2025-09-23 627 rc = hv_crash_trampoline_setup();
c619422e77519d Mukesh Rathor 2025-09-23 628 if (rc)
c619422e77519d Mukesh Rathor 2025-09-23 629 goto err_out;
c619422e77519d Mukesh Rathor 2025-09-23 630
c619422e77519d Mukesh Rathor 2025-09-23 @631 smp_ops.crash_stop_other_cpus = hv_crash_stop_other_cpus;
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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