From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46F5539182E for ; Mon, 16 Mar 2026 11:50:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773661837; cv=none; b=kZmWNxHD0Srlg+IDBdbnuWj/ml5ReaUz666njPw73v/v1BO1psT0pWAzUzx8BLlfd9kbVEVh6b7QH+S62wUbdLf5ic0a9YUtbQ9FYkD4jjllnWvCbH+h5dZXRWRTflN5skiJUflQ6AKIi9BD30BcEQ0cyvMRC3d5e6xPNNiR7WY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773661837; c=relaxed/simple; bh=uPHgjUUn8VsVJXlffrTlOt7/AdJOHet4wTx4z9k4RXE=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pqGky5JW47O9IrM9sZIvmRqG7IMKNBfbHvodwdxIG2m0xFlXW+QI1G8zjBH7snSefwFSVvN46yCUQo4G86T1/tjjwhJ83itbbaSm+vAKw90jkF0U3oS1vtZjaSAFXUQrljD3mFJOBVaPc4YRpYWZsv/gZCcBSmbWFCFiYVioZRY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ZwiqZVr7; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ZwiqZVr7" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-485445e80bdso39346135e9.0 for ; Mon, 16 Mar 2026 04:50:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773661832; x=1774266632; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:from:to:cc:subject:date :message-id:reply-to; bh=5kQhGtTK/Lt5/UNF5mERVigZml+1Hw4HwS17dAwaToA=; b=ZwiqZVr7kcG9m9YwtSy2CrLxZrMtxdPcTH/eDgk7vFYWMzcW9j5M+p9jUjxoIFNL2K E4AtTAMQLyMWS/UDG5nc5iODFtuFsBIy9eq6/4EXgM5yAk3MBGnMuPRKdxDkFn1LNTBJ fSbTkRQgemYKibMW9rLX/S2/QN5sTR/1mzTHM4bSUJIWL1nM6dRQumo4TCPiwcQjSp+i PaJEDR8kCf3ahkytXox4yN/gKCdiQWIvLrDohBXOPm3zelLy4lLcu4/pjlocwnkvvwxd 7/OU0z3UtS1p1uocTIK6IJwRrUqf1l+ApOTUxk/dWHg9UUhEgYKqY4yOqpOunAsLNO9/ L3AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773661832; x=1774266632; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=5kQhGtTK/Lt5/UNF5mERVigZml+1Hw4HwS17dAwaToA=; b=JJU2nhUylYwIyw7R9tJjQEEefb4dO5UxCu8LcecXVWhgmWpONfZi/BSKYI/jzVSVcg tf546YYwyKMPHEN+GudfxuKOJgE5eVOlTunoE1yHgROZnimHdpy7TzNkCf0uIXV3rkXz yw1I/VdLrdbQyBP7Y7p9armdHR+8FUUiab6tuN1c8qjbilZV+dzAf8xfJOYb3W9Q0dOi cokOxlXLR/mnL7iTu4VVYpMcVjITCOPHClvgC70cf40mdxbUkmsS5EVuNE2GITn6H1AK qloUkjj2VFJVFAKvm7O7G2vUaNkI/KseNM+hcVR7s16iRfX0c/fZO7zRR0NupoIKWrf7 MfdQ== X-Forwarded-Encrypted: i=1; AJvYcCU4zHnvRAgDNP8mMNTwd0OvwyCJdPusNTENtLmS+3H73fjrbM25onoltIFOeB+DbtnFJ9Cls/fsMgiJ@vger.kernel.org X-Gm-Message-State: AOJu0Ywq5jqWs5GBw7rrLfNTyMX6bPB4w265z1zL2g0IsnjRg7KcJA/y VXarWe3iBVva3nOlodF4oBOT7UuRrFJfWsWPSgIyWrP1jEHIUzhPpNAv X-Gm-Gg: ATEYQzxOeZgOeMswacAixJzImemuxLw0Z5pO7V2Z+3h3Y6xJxkpO+ivR/suBnUftmvq /hkmMyQw+ZC1UedBYzczkV2wV/85fUW7wpxAj5CyTXnZc2A8DEDk3VV3/b9Bz5Q7efKZ4IkghJd FiTt8J34da6JguHYlztWfRPJN8dhrfioOTfciT+cvIEXFDGef/MfunXuGOOgG3O2yzRvgMz5Gsb oZWHRsTZpEVgj/fBisjpPXE/+9PBvk/Vl9xtmRu8pPszrfH7U0Oxwk8uSVs1Hd2nNvx6i06sNEQ JQc1JoKPJ7RiOyhPvho4Oj8zNnmKpwtunJoJ26FR+DjVYdvlIQ5ex7N5xVhAi7jNKNTzEzbvg9A KHUkpZQa4MxlMj7RDO4J1g4W1IBwSZmmPdRsNmEAXA3jRTWWjyIQnRD5wvKLlhYw7qh5JKuORku R/tS582LXkbhzpF6dPl2PhLdscok8QNVWp7+sgmvcR6kdEW6gBoexKgDeMWE7P970K X-Received: by 2002:a05:600c:1e8b:b0:483:b505:9db7 with SMTP id 5b1f17b1804b1-4855672ada8mr206704535e9.32.1773661832366; Mon, 16 Mar 2026 04:50:32 -0700 (PDT) Received: from pumpkin (82-69-66-36.dsl.in-addr.zen.co.uk. [82.69.66.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4854b47145dsm421847035e9.0.2026.03.16.04.50.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Mar 2026 04:50:32 -0700 (PDT) Date: Mon, 16 Mar 2026 11:50:30 +0000 From: David Laight To: K Prateek Nayak Cc: Thomas Gleixner , Ingo Molnar , "Peter Zijlstra" , Sebastian Andrzej Siewior , Catalin Marinas , "Will Deacon" , Darren Hart , Davidlohr Bueso , =?UTF-8?B?QW5kcsOp?= Almeida , , , , , , Jisheng Zhang Subject: Re: [RFC PATCH v2 2/7] arm64/runtime-const: Introduce runtime_const_mask_32() Message-ID: <20260316115030.6988ad62@pumpkin> In-Reply-To: <20260316052401.18910-3-kprateek.nayak@amd.com> References: <20260316052401.18910-1-kprateek.nayak@amd.com> <20260316052401.18910-3-kprateek.nayak@amd.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Mon, 16 Mar 2026 05:23:56 +0000 K Prateek Nayak wrote: > Futex hash computation requires a mask operation with read-only after > init data that will be converted to a runtime constant in the subsequent > commit. > > Introduce runtime_const_mask_32 to further optimize the mask operation > in the futex hash computation hot path. GCC generates a: > > movz w1, #lo16, lsl #0 // w1 = bits [15:0] > movk w1, #hi16, lsl #16 // w1 = full 32-bit value > and w0, w0, w1 // w0 = w0 & w1 I don't thing the '&' needs to be part of the asm block. Just generate the 32bit constant and do the mask in C. That will let the compiler schedule the instructions. It also make the code patching more generally useful. David > > pattern to tackle arbitrary 32-bit masks and the same was also suggested > by Claude which is implemented here. __runtime_fixup_ptr() already > patches a "movz, + movk lsl #16" sequence which has been reused to patch > the same sequence for __runtime_fixup_mask(). > > Assisted-by: Claude:claude-sonnet-4-5 > Signed-off-by: K Prateek Nayak > --- > arch/arm64/include/asm/runtime-const.h | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/include/asm/runtime-const.h b/arch/arm64/include/asm/runtime-const.h > index c3dbd3ae68f6..4c3f0b9aad98 100644 > --- a/arch/arm64/include/asm/runtime-const.h > +++ b/arch/arm64/include/asm/runtime-const.h > @@ -35,6 +35,19 @@ > :"r" (0u+(val))); \ > __ret; }) > > +#define runtime_const_mask_32(val, sym) ({ \ > + unsigned long __ret; \ > + asm_inline("1:\t" \ > + "movz %w0, #0xcdef\n\t" \ > + "movk %w0, #0x89ab, lsl #16\n\t" \ > + "and %w0,%w0,%w1\n\t" \ > + ".pushsection runtime_mask_" #sym ",\"a\"\n\t" \ > + ".long 1b - .\n\t" \ > + ".popsection" \ > + :"=r" (__ret) \ > + :"r" (0u+(val))); \ > + __ret; }) > + > #define runtime_const_init(type, sym) do { \ > extern s32 __start_runtime_##type##_##sym[]; \ > extern s32 __stop_runtime_##type##_##sym[]; \ > @@ -80,6 +93,15 @@ static inline void __runtime_fixup_shift(void *where, unsigned long val) > __runtime_fixup_caches(where, 1); > } > > +/* Immediate value is 6 bits starting at bit #16 */ > +static inline void __runtime_fixup_mask(void *where, unsigned long val) > +{ > + __le32 *p = lm_alias(where); > + __runtime_fixup_16(p, val); > + __runtime_fixup_16(p+1, val >> 16); > + __runtime_fixup_caches(where, 2); > +} > + > static inline void runtime_const_fixup(void (*fn)(void *, unsigned long), > unsigned long val, s32 *start, s32 *end) > {