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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3414407c548sm7322093eec.8.2026.09.25.11.37.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Sep 2026 11:37:18 -0700 (PDT) Date: Fri, 25 Sep 2026 11:37:09 -0700 From: Jonathan Cameron To: Jason Gunthorpe Cc: Alexandre Ghiti , Albert Ou , Ard Biesheuvel , Arnd Bergmann , Catalin Marinas , Jonathan Corbet , David Sterba , Ilias Apalodimas , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-efi@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paul Walmsley , Randy Dunlap , Simon Glass , Shuah Khan , Nick Terrell , Will Deacon , Alexandre Ghiti , Conor Dooley , linux-integrity@vger.kernel.org, Palmer Dabbelt , patches@lists.linux.dev, Ross Philipson , Sami Tolvanen , Song Shuai Subject: Re: [PATCH 16/16] efi/arm64: Implement ARM64 DRTM in the stub Message-ID: <20260925113709.00005cd1@oss.qualcomm.com> In-Reply-To: <16-v1-27d06b313981+8b-arm64_drtm_jgg@nvidia.com> References: <0-v1-27d06b313981+8b-arm64_drtm_jgg@nvidia.com> <16-v1-27d06b313981+8b-arm64_drtm_jgg@nvidia.com> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-arch@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: NmImrQ-niOuMzf2l_WlDSff2ybj9o-eg X-Authority-Analysis: v=2.4 cv=YqCa1IYX c=1 sm=1 tr=0 ts=6ab6bf62 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=Ikd4Dj_1AAAA:8 a=jWgNheo0oZ5oaBA2q4oA:9 a=CjuIK1q_8ugA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-ORIG-GUID: NmImrQ-niOuMzf2l_WlDSff2ybj9o-eg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI1MDA3NCBTYWx0ZWRfX3jnufLFrofSx 5A8A1uqfQNEedKMOqybszgiPI71Mr1pP0j+9gu+ySzrxRLtnXe8L62DfAzQpwLnkBZ4f5WFFMjp Bznipk9vTyclBhbAyHx2LoOJquipYoPAogIyR1xLjdrLxP2PBQKP9LApeKq0AIfb+RJo0SPIMPG 1ICF0tiMGkzgHet7YkZzaAc34H/7olUrhLYtdQIfumX/VhL8d25VKk78HMUUVTYNfz16L0zNhWe e0ws/m0t9xRftID6LUr41otSETXeLSgCzNjH5kyP4vhSNX835ov2tGnIk9eYyXtjsGrrNBerauc p6Eaw3nbm4seMiSCQR7JEk94vUHIo30DYj1qTJ1biSqvOYBt+rHxUkJD9AE8OjMwZuTO5/lFPAB ToBmhptsIrnFW/RrAFGIvyU8z4qKDCQ2DB9E6CcwU/VUY7M2ad8tiJrM6ETMyNKJT8/nf6eI7DA LnFIdulyy8q+1Lw9Nkw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI1MDA3NCBTYWx0ZWRfX4fJHLbcEZk19 6MVTb+Ih1TGSoYR3TrLH/cgGk4OnLEDoTzW0j20PMdxWz3pSwIvbR8pi0X2/ooP0Us+IUN3UG/f +ht3FTUL1Fea50yiTz76MA9axxA4ZHI= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-25_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 priorityscore=1501 phishscore=0 clxscore=1015 malwarescore=0 impostorscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609250074 On Thu, 24 Sep 2026 10:53:19 -0300 Jason Gunthorpe wrote: > Provide an implementation of the CONFIG_EFI_STUB_DRTM protocol for ARM64 > DEN0113 >= v1.1. > > First, it queries the FW for support and collects all the > information. This is needed to compute the extra_size, which comes > from FW reporting how much memory it needs during the launch for the > DLME Data and DCE-owned data. The generic stub ensures there is > trailing memory after Image for this. > > Then the DRTM_PARAMETERS launch structure is computed using the > offsets in the efi_info. > > Finally, the stub does ExitBootServices and calls the actual launch. ARM_DRTM_FEATURE_DMA_PROTECTION> > The feature discovery process is deliberately fairly verbose to help > debug any FW weirdness in the field. Enable it with efi=debug > > It looks something like: > > EFI stub: DRTM: interface version 1.4 > EFI stub: DEBUG: DRTM: TPM algorithm 0xc, TPM hashing unavailable, PCR schemas 0x1 > EFI stub: DEBUG: DRTM: minimum DLME data 73728 bytes, Normal-world DCE 0 bytes > EFI stub: Decompressing Linux Kernel... > EFI stub: Generating empty DTB > EFI stub: Exiting boot services... > EFI stub: DEBUG: DRTM: will launch, selected launch features 0x0 > [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510] > > Eventually the launch'd kernel is going to require built in crypto > libraries that match what the FW is using so it can validate some of the > information left behind during early boot. Refuse to launch if these are > not built in and build in the most common ones from the ARM64_DRTM > kconfig. > > One nit, if the platform does not support SMC then using drtm=auto may > crash on the SMC op. As far as I can tell there is no way to discover SMC > support through EFI. Learning it from the ACPI FADT is doable and costs > about 250 lines of code. > > Signed-off-by: Jason Gunthorpe First read though only found some superficial stuff. Generally looks fine to me. Jonathan > diff --git a/drivers/firmware/efi/libstub/arm64-drtm.c b/drivers/firmware/efi/libstub/arm64-drtm.c > new file mode 100644 > index 00000000000000..12ddf7c2dd056a > --- /dev/null > +++ b/drivers/firmware/efi/libstub/arm64-drtm.c > + > +static bool efi_drtm_probe_memory(void) > +{ > + u64 value; > + > + if (!efi_drtm_query_feature(ARM_DRTM_FEATURE_MIN_MEMORY, &value)) > + return false; > + > + drtm_cfg.dlme_data_size = > + FIELD_GET(ARM_DRTM_DLME_DATA_PAGES_MASK, value) * > + ARM_DRTM_PAGE_SIZE; > + drtm_cfg.nw_dce_size = FIELD_GET(ARM_DRTM_NW_DCE_PAGES_MASK, value) * > + ARM_DRTM_PAGE_SIZE; > + > + efi_debug( > + "DRTM: minimum DLME data %lu bytes, Normal-world DCE %lu bytes\n", That code formatter loves the silly. This is definitely not more readable than a slightly longer line! I'm reading upwards and got bored now - will assume you'll take a look and tidy up other such silliness. > + drtm_cfg.dlme_data_size, drtm_cfg.nw_dce_size); > + return true; > +} > + > +static void efi_drtm_report_previous_error(void) > +{ > + s64 error_code; > + s64 status; > + > + status = arm_drtm_features(ARM_DRTM_SMC_GET_ERROR, NULL); > + if (status != ARM_DRTM_SUCCESS) { > + efi_debug("DRTM: GET_ERROR is unavailable (x0=%lld)\n", status); > + return; > + } > + > + status = arm_drtm_get_error(&error_code); > + if (status != ARM_DRTM_SUCCESS) { > + efi_warn("DRTM: failed to read previous error (x0=%lld)\n", > + status); > + return; > + } > + > + if (error_code) { > + efi_warn( > + "DRTM: firmware reports previous launch error 0x%llx\n", That code formatter is being silly again. > + error_code); > + if (efi_drtm_policy != EFI_DRTM_ENFORCE) > + efi_drtm_policy = EFI_DRTM_OFF; > + } > +} > + > +efi_status_t efi_drtm_prepare(void) > +{ > + s64 feature_status; > + u16 major, minor; > + s32 status; > + > + if (efi_drtm_policy == EFI_DRTM_OFF) > + return EFI_SUCCESS; > + > + if (!efi_arm64_psci_smccc_compatible()) > + return efi_drtm_failure(); > + > + /* VERSION must be the first DRTM call. */ Words like 'must' should be backed by a specific spec reference. I couldn't immediately fine one other than common sense suggesting it should be called to check we have a version we understand ho to talk to. > + status = arm_drtm_version(&major, &minor); > + if (status != ARM_DRTM_SUCCESS) { > + efi_err("DRTM: failed to read interface version (x0=%d)\n", > + status); > + return efi_drtm_failure(); > + } > + if (major != ARM_DRTM_VERSION_MAJOR || > + minor < ARM_DRTM_VERSION_MIN_MINOR) { > + efi_err("DRTM: unsupported interface version %u.%u\n", major, > + minor); > + return efi_drtm_failure(); > + } > + efi_info("DRTM: interface version %u.%u\n", major, minor); > + > + efi_drtm_report_previous_error(); > + if (efi_drtm_policy == EFI_DRTM_OFF) > + return EFI_SUCCESS; > + > + feature_status = arm_drtm_features(ARM_DRTM_SMC_DYNAMIC_LAUNCH, NULL); > + if (feature_status != ARM_DRTM_SUCCESS) { > + efi_err("DRTM: dynamic launch is unavailable (x0=%lld)\n", > + feature_status); > + return efi_drtm_failure(); > + } > + > + if (!efi_drtm_probe_tpm() || !efi_drtm_probe_memory() || > + !efi_drtm_probe_dma() || !efi_drtm_probe_boot_pe()) > + return efi_drtm_failure(); > + > + drtm_cfg.launch_features = > + ARM_DRTM_LAUNCH_HASH_FIRMWARE | ARM_DRTM_LAUNCH_PCR_DEFAULT | > + ARM_DRTM_LAUNCH_DMA_COMPLETE | ARM_DRTM_LAUNCH_NO_AUTH | > + ARM_DRTM_LAUNCH_KEEP_SECURE_IRQS; > + > + return EFI_SUCCESS; > +} > + > +unsigned long efi_drtm_get_extra_size(void) > +{ > + /* > + * DEN0113 Table 6, feature 0x2 reports both minimum sizes in 4 KiB > + * pages. The linker places the DLME data at the 4 KiB-aligned end of > + * the static Image as required by R314030. The DLME region must > + * include all of that data (R45200), and an optional Normal-world DCE > + * follows it at another 4 KiB-aligned address as required by R312080. > + * A final page holds the 4 KiB-aligned DRTM_PARAMETERS required by > + * R312010. Only the first area is part of the DLME region. > + */ > + if (efi_drtm_policy == EFI_DRTM_OFF) > + return 0; > + return drtm_cfg.dlme_data_size + drtm_cfg.nw_dce_size + > + ARM_DRTM_PAGE_SIZE; > +} > + > +efi_status_t efi_drtm_prepare_launch(unsigned long image_base, > + unsigned long fdt_addr) > +{ > + const struct arm64_image_header *header = (const void *)image_base; > + const struct efi_image_info *info = efi_get_image_info(image_base); > + struct arm64_drtm_handoff *handoff = > + efi_get_image_symbol(image_base, arm64_drtm_handoff); > + struct arm_drtm_parameters *params; > + unsigned long measured_offset; > + unsigned long measured_size; > + unsigned long image_size; > + unsigned long dlme_start; > + unsigned long dlme_end; > + unsigned long dce_end; > + unsigned long entry; > + > + if (efi_drtm_policy == EFI_DRTM_OFF) > + return EFI_SUCCESS; > + > + image_size = le64_to_cpu(header->image_size); > + measured_offset = le64_to_cpu(info->drtm_measured_start); > + measured_size = le64_to_cpu(info->dlme_measured_size); > + entry = le64_to_cpu(info->drtm_entry); > + dlme_start = image_base + image_size; > + dlme_end = dlme_start + drtm_cfg.dlme_data_size; > + dce_end = dlme_end + drtm_cfg.nw_dce_size; > + > + /* Quick checks something didn't go wrong during image construction */ > + if (entry < measured_offset || > + entry - measured_offset >= measured_size || > + !IS_ALIGNED(image_base, ARM_DRTM_PAGE_SIZE) || > + !IS_ALIGNED(image_size, ARM_DRTM_PAGE_SIZE) || > + !IS_ALIGNED(measured_offset, ARM_DRTM_PAGE_SIZE) || > + !IS_ALIGNED(dlme_start, ARM_DRTM_PAGE_SIZE) || > + !IS_ALIGNED(dlme_end, ARM_DRTM_PAGE_SIZE) || > + !IS_ALIGNED(dce_end, ARM_DRTM_PAGE_SIZE)) { > + efi_err("DRTM: final Image layout is invalid\n"); > + return efi_drtm_failure(); > + } > + > + /* > + * See arch/arm64/kernel/vmlinux.lds.S for the DRTM Memory layout. After > + * the DLME we choose to place the Normal World DCE region followed by > + * the aligned DRTM_PARAMETERS structure. > + */ > + memset((void *)dlme_start, 0, efi_drtm_get_extra_size()); Is that efi_drtm_get_extra_size() adding much? It is a little irritating to have to go look in there to figure out that this memset actually covers the params. If you were to just have the sum visible here that would be more obvious and align with the comment immediately above the memset. Maybe it is worth keeping for the big comment in there, but it does feel like that and what we have here could be combined. > + params = (void *)dce_end; > + params->revision = cpu_to_le16(ARM_DRTM_PARAMETERS_REVISION); > + params->launch_features = cpu_to_le32(drtm_cfg.launch_features); > + params->dlme_region_address = cpu_to_le64(image_base); > + params->dlme_region_size = cpu_to_le64(dlme_end - image_base); > + params->dlme_image_start = cpu_to_le64(measured_offset); > + params->dlme_entry_point_offset = cpu_to_le64(entry - measured_offset); > + params->dlme_image_size = cpu_to_le64(measured_size); > + params->dlme_data_offset = cpu_to_le64(image_size); > + if (drtm_cfg.nw_dce_size) { > + params->nw_dce_region_address = cpu_to_le64(dlme_end); > + params->nw_dce_region_size = cpu_to_le64(drtm_cfg.nw_dce_size); > + } > + > + /* > + * The DLME Data contains its own size in a trusted header, so the > + * handoff doesn't need to include extra_size. The DCE Data is only > + * temporary so the kernel also does not need to know about it. > + */ > + handoff->fdt_addr = cpu_to_le64(fdt_addr); > + handoff->drtm_enabled = 1; > + > + efi_debug("DRTM: will launch, selected launch features 0x%x\n", > + drtm_cfg.launch_features); > + > + drtm_cfg.params_addr = params; > + return EFI_SUCCESS; > +} > + > +static void efi_drtm_fallback(void) > +{ > + struct arm_drtm_parameters *params = drtm_cfg.params_addr; > + unsigned long image_base = le64_to_cpu(params->dlme_region_address); > + struct arm64_drtm_handoff *handoff = > + efi_get_image_symbol(image_base, arm64_drtm_handoff); > + > + handoff->drtm_enabled = 0; > +} > + > +void efi_drtm_launch(void) > +{ > + I love trivial. Pointless blank line. > + if (efi_drtm_policy == EFI_DRTM_OFF) > + return; > + > + /* > + * No cache maintenance is required before the launch. DEN0113 R42130 > + * requires the DRTM_PARAMETERS to be accessible as Normal Write-Back > + * Cacheable, Inner Shareable memory, so the DCE reads them coherently > + * with the writes made above. R45220 then has the DCE clean and > + * invalidate the whole DLME region to the Point of Coherency before it > + * measures the DLME image, which covers both the Image itself and the > + * handoff struct placed in the DLME region. Thus once we jump into the > + * kernel with MMU and caches off the CPU will see everything the stub > + * wrote. > + */ > + arm_drtm_dynamic_launch(drtm_cfg.params_addr); > + > + /* > + * DEN0113 section 3.4 returns from DYNAMIC_LAUNCH only on error. Boot I'd use a spec version for references + ideally title of section. As much as folk may try, sometimes these things move around. Also tweak the wording. Failure sure the section doesn't return from anything :) > + * services and their diagnostics are no longer available, so hang. > + */ > + if (efi_drtm_policy == EFI_DRTM_ENFORCE) { > + for (;;) > + asm volatile("wfe"); > + } > + > + efi_drtm_fallback(); > +}