I apologise if this is a duplicate post. The first one didn't seem to go through properly. --- Having arch code know about scheduler locking in their context switch stuff is somewhat ugly I think. It was somewhat acceptable because they all used the same implementation. However the ARM port recently has wanted a slightly different system, and also does some clever !SMP optimisations there. So I propose a system where the locking implementations are hidden in kernel/sched.c. Architectures can define __ARCH_WANT_UNLOCKED_CTXSW or __ARCH_WANT_INTERRUPTS_ON_CTXSW. Those that do need to define TIF_RUNNING, which I haven't done in the patch. Why have a locked, interrupts off context switch at all then? Architectures which can do the switch quickly can keep it atomic and not incur the small cost of an atomic set and clear TIF_RUNNING per switch. Affected architectures: ia64, mips, s390, sparc, sparc64, arm. Comments?