From: Nick Piggin <nickpiggin@yahoo.com.au>
To: "David S. Miller" <davem@davemloft.net>
Cc: linux-arch@vger.kernel.org
Subject: Re: [Fwd: [PATCH 2.6.13] lockless pagecache 2/7]
Date: Fri, 02 Sep 2005 18:05:49 +1000 [thread overview]
Message-ID: <431807DD.5030105@yahoo.com.au> (raw)
In-Reply-To: <20050902.003940.68050984.davem@davemloft.net>
David S. Miller wrote:
> Sparc32 lacks compare and exchange. I think PARISC lacks it
> as well.
>
> For these older SMP systems, at best you can assume there
> is some kind of spinlock and perhaps a straight atomic
> exchange instruction. You really can't assume the existance
> of compare-and-swap.
>
Thanks David, I suspected as much.
PARISC emulates cmpxchg. I suspect sparc could do the same?
(provided all access goes through the atomic_xxx accessors)
Nick
--
SUSE Labs, Novell Inc.
Send instant messages to your online friends http://au.messenger.yahoo.com
next prev parent reply other threads:[~2005-09-02 8:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-09-02 6:36 [Fwd: [PATCH 2.6.13] lockless pagecache 2/7] Nick Piggin
2005-09-02 7:39 ` David S. Miller
2005-09-02 8:05 ` Nick Piggin [this message]
2005-09-04 13:28 ` Matthew Wilcox
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