* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 17:03 ` Russell King
@ 2009-10-12 17:03 ` Russell King
2009-10-12 17:12 ` Nitin Gupta
` (4 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Russell King @ 2009-10-12 17:03 UTC (permalink / raw)
To: Hugh Dickins
Cc: David Miller, Nitin Gupta, Nick Piggin, linux-arm-kernel,
linux-kernel, linux-arch
On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
> Sorry to muddy the waters on this, if you and Dave are sure that
> you have the right fix, down in your architectures, and that fix
> isn't going to hurt your performance significantly.
If I look at the issue from this point of view:
- we are using PG_arch_1 to delay cache handling for the page
- if PG_arch_1 is set on a page, we set it explicitly because we
didn't do some flushing between the allocation of the page and
mapping it into userspace
- if a page with PG_arch_1 set ever gets to userspace, this can
only be because we did the lazy flushing thing
I don't see that there should have been any bearing on whether a page
has a mapping or not when we get to update_mmu_cache. The issue here
is that > if PG_arch_1 is set on a page, then we didn't flush it at
the time when we believed it was appropriate to do so. <
Tell me I'm wrong (having only just sent it to Linus...)
--
Russell King
Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/
maintainer of:
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 17:03 ` Russell King
2009-10-12 17:03 ` Russell King
@ 2009-10-12 17:12 ` Nitin Gupta
2009-10-12 17:12 ` Nitin Gupta
` (3 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Nitin Gupta @ 2009-10-12 17:12 UTC (permalink / raw)
To: Hugh Dickins, David Miller, Nick Piggin, linux-arm-kernel,
linux-kernel
On 10/12/2009 10:33 PM, Russell King wrote:
> On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
>> Sorry to muddy the waters on this, if you and Dave are sure that
>> you have the right fix, down in your architectures, and that fix
>> isn't going to hurt your performance significantly.
>
> If I look at the issue from this point of view:
>
> - we are using PG_arch_1 to delay cache handling for the page
>
> - if PG_arch_1 is set on a page, we set it explicitly because we
> didn't do some flushing between the allocation of the page and
> mapping it into userspace
>
> - if a page with PG_arch_1 set ever gets to userspace, this can
> only be because we did the lazy flushing thing
>
> I don't see that there should have been any bearing on whether a page
> has a mapping or not when we get to update_mmu_cache. The issue here
> is that > if PG_arch_1 is set on a page, then we didn't flush it at
> the time when we believed it was appropriate to do so. <
>
Presented so clearly by Russell and this is exactly what I meant, though
the example just focused on some particular swap case which I happen to
stumble upon while working on something similar.
Thanks,
Nitin
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 17:03 ` Russell King
2009-10-12 17:03 ` Russell King
2009-10-12 17:12 ` Nitin Gupta
@ 2009-10-12 17:12 ` Nitin Gupta
2009-10-12 18:06 ` Hugh Dickins
` (2 subsequent siblings)
5 siblings, 0 replies; 16+ messages in thread
From: Nitin Gupta @ 2009-10-12 17:12 UTC (permalink / raw)
To: Hugh Dickins, David Miller, Nick Piggin, linux-arm-kernel,
linux-kernel, linux-arch
On 10/12/2009 10:33 PM, Russell King wrote:
> On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
>> Sorry to muddy the waters on this, if you and Dave are sure that
>> you have the right fix, down in your architectures, and that fix
>> isn't going to hurt your performance significantly.
>
> If I look at the issue from this point of view:
>
> - we are using PG_arch_1 to delay cache handling for the page
>
> - if PG_arch_1 is set on a page, we set it explicitly because we
> didn't do some flushing between the allocation of the page and
> mapping it into userspace
>
> - if a page with PG_arch_1 set ever gets to userspace, this can
> only be because we did the lazy flushing thing
>
> I don't see that there should have been any bearing on whether a page
> has a mapping or not when we get to update_mmu_cache. The issue here
> is that > if PG_arch_1 is set on a page, then we didn't flush it at
> the time when we believed it was appropriate to do so. <
>
Presented so clearly by Russell and this is exactly what I meant, though
the example just focused on some particular swap case which I happen to
stumble upon while working on something similar.
Thanks,
Nitin
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 17:03 ` Russell King
` (2 preceding siblings ...)
2009-10-12 17:12 ` Nitin Gupta
@ 2009-10-12 18:06 ` Hugh Dickins
2009-10-12 18:06 ` Hugh Dickins
2009-10-15 21:48 ` Kyle McMartin
2009-10-13 2:07 ` Paul Mundt
2009-10-13 2:07 ` Paul Mundt
5 siblings, 2 replies; 16+ messages in thread
From: Hugh Dickins @ 2009-10-12 18:06 UTC (permalink / raw)
To: Russell King
Cc: Nick Piggin, Paul Mundt, linux-kernel, Ralf Baechle,
Kyle McMartin, Chen Liqin, linux-arm-kernel, linux-arch,
David Miller, Nitin Gupta
On Mon, 12 Oct 2009, Russell King wrote:
> On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
> > Sorry to muddy the waters on this, if you and Dave are sure that
> > you have the right fix, down in your architectures, and that fix
> > isn't going to hurt your performance significantly.
>
> If I look at the issue from this point of view:
>
> - we are using PG_arch_1 to delay cache handling for the page
>
> - if PG_arch_1 is set on a page, we set it explicitly because we
> didn't do some flushing between the allocation of the page and
> mapping it into userspace
>
> - if a page with PG_arch_1 set ever gets to userspace, this can
> only be because we did the lazy flushing thing
>
> I don't see that there should have been any bearing on whether a page
> has a mapping or not when we get to update_mmu_cache. The issue here
> is that > if PG_arch_1 is set on a page, then we didn't flush it at
> the time when we believed it was appropriate to do so. <
>
> Tell me I'm wrong (having only just sent it to Linus...)
I wouldn't dare! Put that way, it seems very clear that it was always
at best a redundant test, which Nitin now shows can go wrong. Okay,
thanks, let's forget about whether file invalidation can or cannot
also put a page into this state, and proceed with your fix.
The architectures which appear to need fixing in the same way are
arm, mips, parisc, sh and sparc64 (xtensa looks right already, and
score just looks confused - a whole function __update_cache() which
checks for PG_arch_1, yet nothing sets it?).
Hugh
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 18:06 ` Hugh Dickins
@ 2009-10-12 18:06 ` Hugh Dickins
2009-10-15 21:48 ` Kyle McMartin
1 sibling, 0 replies; 16+ messages in thread
From: Hugh Dickins @ 2009-10-12 18:06 UTC (permalink / raw)
To: Russell King
Cc: David Miller, Nitin Gupta, Nick Piggin, Ralf Baechle,
Kyle McMartin, Paul Mundt, Chen Liqin, linux-arm-kernel,
linux-kernel, linux-arch
On Mon, 12 Oct 2009, Russell King wrote:
> On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
> > Sorry to muddy the waters on this, if you and Dave are sure that
> > you have the right fix, down in your architectures, and that fix
> > isn't going to hurt your performance significantly.
>
> If I look at the issue from this point of view:
>
> - we are using PG_arch_1 to delay cache handling for the page
>
> - if PG_arch_1 is set on a page, we set it explicitly because we
> didn't do some flushing between the allocation of the page and
> mapping it into userspace
>
> - if a page with PG_arch_1 set ever gets to userspace, this can
> only be because we did the lazy flushing thing
>
> I don't see that there should have been any bearing on whether a page
> has a mapping or not when we get to update_mmu_cache. The issue here
> is that > if PG_arch_1 is set on a page, then we didn't flush it at
> the time when we believed it was appropriate to do so. <
>
> Tell me I'm wrong (having only just sent it to Linus...)
I wouldn't dare! Put that way, it seems very clear that it was always
at best a redundant test, which Nitin now shows can go wrong. Okay,
thanks, let's forget about whether file invalidation can or cannot
also put a page into this state, and proceed with your fix.
The architectures which appear to need fixing in the same way are
arm, mips, parisc, sh and sparc64 (xtensa looks right already, and
score just looks confused - a whole function __update_cache() which
checks for PG_arch_1, yet nothing sets it?).
Hugh
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 18:06 ` Hugh Dickins
2009-10-12 18:06 ` Hugh Dickins
@ 2009-10-15 21:48 ` Kyle McMartin
2009-10-15 21:48 ` Kyle McMartin
1 sibling, 1 reply; 16+ messages in thread
From: Kyle McMartin @ 2009-10-15 21:48 UTC (permalink / raw)
To: Hugh Dickins
Cc: Nick Piggin, Paul Mundt, Russell King, linux-kernel, Ralf Baechle,
Kyle McMartin, Chen Liqin, linux-arm-kernel, linux-arch,
James.Bottomley, David Miller, Nitin Gupta
On Mon, Oct 12, 2009 at 07:06:04PM +0100, Hugh Dickins wrote:
> The architectures which appear to need fixing in the same way are
> arm, mips, parisc, sh and sparc64 (xtensa looks right already, and
> score just looks confused - a whole function __update_cache() which
> checks for PG_arch_1, yet nothing sets it?).
>
parisc looks affected as well, though I don't recall the semantics of
dcache flushing without a mapping. James, can you send a patch?
WRT score, which seems to have been mostly cobbled together as a modern
copy of mips, it can likely be eliminated entirely, as it looks to have
been cargoculted from mips without thought.
regards, Kyle
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-15 21:48 ` Kyle McMartin
@ 2009-10-15 21:48 ` Kyle McMartin
0 siblings, 0 replies; 16+ messages in thread
From: Kyle McMartin @ 2009-10-15 21:48 UTC (permalink / raw)
To: Hugh Dickins
Cc: Russell King, David Miller, Nitin Gupta, Nick Piggin,
Ralf Baechle, Kyle McMartin, Paul Mundt, Chen Liqin,
linux-arm-kernel, linux-kernel, linux-arch, James.Bottomley
On Mon, Oct 12, 2009 at 07:06:04PM +0100, Hugh Dickins wrote:
> The architectures which appear to need fixing in the same way are
> arm, mips, parisc, sh and sparc64 (xtensa looks right already, and
> score just looks confused - a whole function __update_cache() which
> checks for PG_arch_1, yet nothing sets it?).
>
parisc looks affected as well, though I don't recall the semantics of
dcache flushing without a mapping. James, can you send a patch?
WRT score, which seems to have been mostly cobbled together as a modern
copy of mips, it can likely be eliminated entirely, as it looks to have
been cargoculted from mips without thought.
regards, Kyle
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 17:03 ` Russell King
` (3 preceding siblings ...)
2009-10-12 18:06 ` Hugh Dickins
@ 2009-10-13 2:07 ` Paul Mundt
2009-10-14 17:10 ` Catalin Marinas
2009-10-13 2:07 ` Paul Mundt
5 siblings, 1 reply; 16+ messages in thread
From: Paul Mundt @ 2009-10-13 2:07 UTC (permalink / raw)
To: Hugh Dickins, David Miller, Nitin Gupta, Nick Piggin,
linux-arm-kernel, linux-kernel, linux-arch
On Mon, Oct 12, 2009 at 06:03:12PM +0100, Russell King wrote:
> On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
> > Sorry to muddy the waters on this, if you and Dave are sure that
> > you have the right fix, down in your architectures, and that fix
> > isn't going to hurt your performance significantly.
>
> If I look at the issue from this point of view:
>
> - we are using PG_arch_1 to delay cache handling for the page
>
> - if PG_arch_1 is set on a page, we set it explicitly because we
> didn't do some flushing between the allocation of the page and
> mapping it into userspace
>
> - if a page with PG_arch_1 set ever gets to userspace, this can
> only be because we did the lazy flushing thing
>
> I don't see that there should have been any bearing on whether a page
> has a mapping or not when we get to update_mmu_cache. The issue here
> is that > if PG_arch_1 is set on a page, then we didn't flush it at
> the time when we believed it was appropriate to do so. <
>
> Tell me I'm wrong (having only just sent it to Linus...)
>
Having looked at the ARM fix, in the !mapping case do you not need the
I-cache flush on vma->vm_flags & VM_EXEC? Or is the presumption that
flush_icache_page()-type action doesn't need to be undertaken by
flush_dcache_page()/update_mmu_cache() when there is no page_mapping()?
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-13 2:07 ` Paul Mundt
@ 2009-10-14 17:10 ` Catalin Marinas
2009-10-14 17:10 ` Catalin Marinas
2009-10-15 11:59 ` Catalin Marinas
0 siblings, 2 replies; 16+ messages in thread
From: Catalin Marinas @ 2009-10-14 17:10 UTC (permalink / raw)
To: Paul Mundt
Cc: Nick Piggin, linux-arch, linux-kernel, Hugh Dickins,
linux-arm-kernel, David Miller, Nitin Gupta
On Tue, 2009-10-13 at 11:07 +0900, Paul Mundt wrote:
> On Mon, Oct 12, 2009 at 06:03:12PM +0100, Russell King wrote:
> > On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
> > > Sorry to muddy the waters on this, if you and Dave are sure that
> > > you have the right fix, down in your architectures, and that fix
> > > isn't going to hurt your performance significantly.
> >
> > If I look at the issue from this point of view:
> >
> > - we are using PG_arch_1 to delay cache handling for the page
> >
> > - if PG_arch_1 is set on a page, we set it explicitly because we
> > didn't do some flushing between the allocation of the page and
> > mapping it into userspace
> >
> > - if a page with PG_arch_1 set ever gets to userspace, this can
> > only be because we did the lazy flushing thing
> >
> > I don't see that there should have been any bearing on whether a page
> > has a mapping or not when we get to update_mmu_cache. The issue here
> > is that > if PG_arch_1 is set on a page, then we didn't flush it at
> > the time when we believed it was appropriate to do so. <
> >
> > Tell me I'm wrong (having only just sent it to Linus...)
>
> Having looked at the ARM fix, in the !mapping case do you not need the
> I-cache flush on vma->vm_flags & VM_EXEC? Or is the presumption that
> flush_icache_page()-type action doesn't need to be undertaken by
> flush_dcache_page()/update_mmu_cache() when there is no page_mapping()?
If I understand Nitin's scenario correctly, I think it should also
invalidate the I-cache.
For executable anonymous pages containing, it's the user app writing the
code (JIT etc.) and it calls an ARM-specific syscall for I and D cache
maintenance. If such page is read back from swap, following Nitin's
scenario, the I-cache would need to be invalidated as well otherwise it
can have stale entries.
--
Catalin
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-14 17:10 ` Catalin Marinas
@ 2009-10-14 17:10 ` Catalin Marinas
2009-10-15 11:59 ` Catalin Marinas
1 sibling, 0 replies; 16+ messages in thread
From: Catalin Marinas @ 2009-10-14 17:10 UTC (permalink / raw)
To: Paul Mundt
Cc: Hugh Dickins, David Miller, Nitin Gupta, Nick Piggin,
linux-arm-kernel, linux-kernel, linux-arch
On Tue, 2009-10-13 at 11:07 +0900, Paul Mundt wrote:
> On Mon, Oct 12, 2009 at 06:03:12PM +0100, Russell King wrote:
> > On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
> > > Sorry to muddy the waters on this, if you and Dave are sure that
> > > you have the right fix, down in your architectures, and that fix
> > > isn't going to hurt your performance significantly.
> >
> > If I look at the issue from this point of view:
> >
> > - we are using PG_arch_1 to delay cache handling for the page
> >
> > - if PG_arch_1 is set on a page, we set it explicitly because we
> > didn't do some flushing between the allocation of the page and
> > mapping it into userspace
> >
> > - if a page with PG_arch_1 set ever gets to userspace, this can
> > only be because we did the lazy flushing thing
> >
> > I don't see that there should have been any bearing on whether a page
> > has a mapping or not when we get to update_mmu_cache. The issue here
> > is that > if PG_arch_1 is set on a page, then we didn't flush it at
> > the time when we believed it was appropriate to do so. <
> >
> > Tell me I'm wrong (having only just sent it to Linus...)
>
> Having looked at the ARM fix, in the !mapping case do you not need the
> I-cache flush on vma->vm_flags & VM_EXEC? Or is the presumption that
> flush_icache_page()-type action doesn't need to be undertaken by
> flush_dcache_page()/update_mmu_cache() when there is no page_mapping()?
If I understand Nitin's scenario correctly, I think it should also
invalidate the I-cache.
For executable anonymous pages containing, it's the user app writing the
code (JIT etc.) and it calls an ARM-specific syscall for I and D cache
maintenance. If such page is read back from swap, following Nitin's
scenario, the I-cache would need to be invalidated as well otherwise it
can have stale entries.
--
Catalin
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-14 17:10 ` Catalin Marinas
2009-10-14 17:10 ` Catalin Marinas
@ 2009-10-15 11:59 ` Catalin Marinas
2009-10-15 11:59 ` Catalin Marinas
1 sibling, 1 reply; 16+ messages in thread
From: Catalin Marinas @ 2009-10-15 11:59 UTC (permalink / raw)
To: Paul Mundt
Cc: Nick Piggin, linux-arch, linux-kernel, Hugh Dickins, Nitin Gupta,
David Miller, linux-arm-kernel
On Wed, 2009-10-14 at 18:10 +0100, Catalin Marinas wrote:
> On Tue, 2009-10-13 at 11:07 +0900, Paul Mundt wrote:
> > On Mon, Oct 12, 2009 at 06:03:12PM +0100, Russell King wrote:
> > > I don't see that there should have been any bearing on whether a page
> > > has a mapping or not when we get to update_mmu_cache. The issue here
> > > is that > if PG_arch_1 is set on a page, then we didn't flush it at
> > > the time when we believed it was appropriate to do so. <
> > >
> > > Tell me I'm wrong (having only just sent it to Linus...)
> >
> > Having looked at the ARM fix, in the !mapping case do you not need the
> > I-cache flush on vma->vm_flags & VM_EXEC? Or is the presumption that
> > flush_icache_page()-type action doesn't need to be undertaken by
> > flush_dcache_page()/update_mmu_cache() when there is no page_mapping()?
>
> If I understand Nitin's scenario correctly, I think it should also
> invalidate the I-cache.
>
> For executable anonymous pages containing, it's the user app writing the
> code (JIT etc.) and it calls an ARM-specific syscall for I and D cache
> maintenance. If such page is read back from swap, following Nitin's
> scenario, the I-cache would need to be invalidated as well otherwise it
> can have stale entries.
We can have a scenario where I-cache invalidation would not help on ARM.
Some apps may temporarily change protection from RX to RW to write some
data (not instructions) to a page containing code. If Nitin's scenario
happens when the page is RW, the VM_EXEC wouldn't be set, hence no
I-cache invalidation.
The app would later do mprotect(RX) but on some ARM processors
flush_cache_range() is a no-op and therefore no cache flushing. What
other architectures with Harvard caches do for mprotect(RX)? Is this
assumed to invalidate the I-cache?
(we have another I-D cache coherency problem on ARM with COW text pages
following a RX -> RW -> write data -> RX scenario and there are a few
solutions for this, though none of them optimal with the current cache
flushing API, especially with the read-implies-exec ELF personality)
--
Catalin
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-15 11:59 ` Catalin Marinas
@ 2009-10-15 11:59 ` Catalin Marinas
0 siblings, 0 replies; 16+ messages in thread
From: Catalin Marinas @ 2009-10-15 11:59 UTC (permalink / raw)
To: Paul Mundt
Cc: Nick Piggin, linux-arch, linux-kernel, Hugh Dickins,
linux-arm-kernel, David Miller, Nitin Gupta
On Wed, 2009-10-14 at 18:10 +0100, Catalin Marinas wrote:
> On Tue, 2009-10-13 at 11:07 +0900, Paul Mundt wrote:
> > On Mon, Oct 12, 2009 at 06:03:12PM +0100, Russell King wrote:
> > > I don't see that there should have been any bearing on whether a page
> > > has a mapping or not when we get to update_mmu_cache. The issue here
> > > is that > if PG_arch_1 is set on a page, then we didn't flush it at
> > > the time when we believed it was appropriate to do so. <
> > >
> > > Tell me I'm wrong (having only just sent it to Linus...)
> >
> > Having looked at the ARM fix, in the !mapping case do you not need the
> > I-cache flush on vma->vm_flags & VM_EXEC? Or is the presumption that
> > flush_icache_page()-type action doesn't need to be undertaken by
> > flush_dcache_page()/update_mmu_cache() when there is no page_mapping()?
>
> If I understand Nitin's scenario correctly, I think it should also
> invalidate the I-cache.
>
> For executable anonymous pages containing, it's the user app writing the
> code (JIT etc.) and it calls an ARM-specific syscall for I and D cache
> maintenance. If such page is read back from swap, following Nitin's
> scenario, the I-cache would need to be invalidated as well otherwise it
> can have stale entries.
We can have a scenario where I-cache invalidation would not help on ARM.
Some apps may temporarily change protection from RX to RW to write some
data (not instructions) to a page containing code. If Nitin's scenario
happens when the page is RW, the VM_EXEC wouldn't be set, hence no
I-cache invalidation.
The app would later do mprotect(RX) but on some ARM processors
flush_cache_range() is a no-op and therefore no cache flushing. What
other architectures with Harvard caches do for mprotect(RX)? Is this
assumed to invalidate the I-cache?
(we have another I-D cache coherency problem on ARM with COW text pages
following a RX -> RW -> write data -> RX scenario and there are a few
solutions for this, though none of them optimal with the current cache
flushing API, especially with the read-implies-exec ELF personality)
--
Catalin
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] [ARM] force dcache flush if dcache_dirty bit set
2009-10-12 17:03 ` Russell King
` (4 preceding siblings ...)
2009-10-13 2:07 ` Paul Mundt
@ 2009-10-13 2:07 ` Paul Mundt
5 siblings, 0 replies; 16+ messages in thread
From: Paul Mundt @ 2009-10-13 2:07 UTC (permalink / raw)
To: Hugh Dickins, David Miller, Nitin Gupta, Nick Piggin,
linux-arm-kernel
On Mon, Oct 12, 2009 at 06:03:12PM +0100, Russell King wrote:
> On Mon, Oct 12, 2009 at 05:09:53PM +0100, Hugh Dickins wrote:
> > Sorry to muddy the waters on this, if you and Dave are sure that
> > you have the right fix, down in your architectures, and that fix
> > isn't going to hurt your performance significantly.
>
> If I look at the issue from this point of view:
>
> - we are using PG_arch_1 to delay cache handling for the page
>
> - if PG_arch_1 is set on a page, we set it explicitly because we
> didn't do some flushing between the allocation of the page and
> mapping it into userspace
>
> - if a page with PG_arch_1 set ever gets to userspace, this can
> only be because we did the lazy flushing thing
>
> I don't see that there should have been any bearing on whether a page
> has a mapping or not when we get to update_mmu_cache. The issue here
> is that > if PG_arch_1 is set on a page, then we didn't flush it at
> the time when we believed it was appropriate to do so. <
>
> Tell me I'm wrong (having only just sent it to Linus...)
>
Having looked at the ARM fix, in the !mapping case do you not need the
I-cache flush on vma->vm_flags & VM_EXEC? Or is the presumption that
flush_icache_page()-type action doesn't need to be undertaken by
flush_dcache_page()/update_mmu_cache() when there is no page_mapping()?
^ permalink raw reply [flat|nested] 16+ messages in thread