From: "André Hentschel" <nerv@dawncrow.de>
To: linux-arch@vger.kernel.org
Cc: Catalin Marinas <catalin.marinas@arm.com>
Subject: Re: arm64: Request to add error code
Date: Tue, 15 Jan 2013 20:27:38 +0100 [thread overview]
Message-ID: <50F5ADAA.20001@dawncrow.de> (raw)
In-Reply-To: <CAHkRjk459Evdt-PQB+ZF_q3Ui58G4t3ApiKDb4RDPaBF320iKA@mail.gmail.com>
Am 15.01.2013 11:47, schrieb Catalin Marinas:
> Hi André,
>
> On 14 January 2013 23:34, André Hentschel <nerv@dawncrow.de> wrote:
>> i'm new to the list (my first kernel mailing list).
>> I'd like to request to add a way to distinguish a read from a write pagefault in userspace on arm64(aarch64).
>> (That's e.g. in a SIGSEGV handler attached with sigaction and SA_SIGINFO)
>> On arm you can use the bit at 0x800 in uc_mcontext.error_code to know which kind it is, but on arm64 i can't find a way.
>> (On most other popular architectures you can get that information, too)
>> I'd suggest to add a flag to siginfo.si_errno, or to make the esr available to the SIGSEGV handler.
>
> The problem with exposing ESR directly to user is that it depends on
> the MMU configuration (e.g. on Cortex-A15 (32-bit) you have different
> formats based on whether you have LPAE enabled or not, though the
> 'write' bit happens to be in the same position).
>
> siginfo for SIGSEGV gives the fault address and type information but,
> as you noticed, doesn't say whether it's a read or write. What do you
> need this information for?
>
Thanks for the answer and the confirmation.
I'm porting Wine to arm64, some winelib applications may rely on the information in case they handle the exception.
--
Best Regards, André Hentschel
prev parent reply other threads:[~2013-01-15 19:27 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-14 23:34 arm64: Request to add error code André Hentschel
2013-01-15 10:47 ` Catalin Marinas
2013-01-15 19:27 ` André Hentschel [this message]
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