From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
To: Grant Likely <grant.likely@secretlab.ca>
Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>,
"linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Michal Simek <monstr@monstr.eu>,
Geert Uytterhoeven <geert@linux-m68k.org>
Subject: Query on I/O accessors used by Xilinx SystemACE Driver
Date: Mon, 21 Jan 2013 18:50:51 +0530 [thread overview]
Message-ID: <50FD40B3.804@synopsys.com> (raw)
Synopsys has Xilinx ML50x boards with our internal FPGA workflows, which we
sometimes use for internal development and customer evaluations. In that light
Alexey has been working on getting the stock systemACE driver to work with ARC
Linux Port.
One of things that he wants me to fix is introduce the PPC/m68k/microblaze style
in_8, in_le16, .... I/O accessors in ARC port, used specifically by driver.
I'm not an expert in that driver or the specific needs of those accessors on
respective arches, but was wondering, if it would be possible to convert the
driver to use the vanilla IO accessors (read{b,w,l}. Microblaze at least, seem to
be defining them as straight wrappers over the standard raw accessors.
Ben, Geert could you please comment ?
Thx,
-Vineet
next reply other threads:[~2013-01-21 13:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-21 13:20 Vineet Gupta [this message]
2013-01-21 22:09 ` Query on I/O accessors used by Xilinx SystemACE Driver Benjamin Herrenschmidt
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