Re: [PATCH v2 2/3] drivers/block/xsysace - use "_rep" accessors with CPU endianess for data

[Michal Simek <monstr@monstr.eu>]

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On 06/24/2013 10:26 AM, Alexey Brodkin wrote:
> Initially different data accessors were used for LE abd BE CPUs:
> "ioread16" in "ace_datain_be16" and "ioread16be" in "ace_datain_le16".
> The same with writes.
> 
> While it worked in some cases (for example on BE PPC) it didn't work in
> others (LE ARC).

I am not sure about this. It seems to me that what you need to do
is swapped wires in your hw design to use the same configuration
as is used on ppc and microblaze for data access.


> Mentioned functions access data (by 16-bit chunks) from storage (i.e.
> CompactFlash card) via DATABUFREG of Xilinx SystemACE CF controller.
> And to interpret data properly CPU needs to access data in DATABUFREG
> with native endianess.

I have had a lot of discussions about using native endianess.
This driver supports endian detection on register side
but not on data side.
Is this soft IP? If yes then just swapped wires on bus and use
standard configuration.

Grant is driver owner and he has to decide if this is acceptable
or not.
I can test it on microblaze hw.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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