From: "H. Peter Anvin" <hpa@linux.intel.com>
To: Joe Perches <joe@perches.com>, "H. Peter Anvin" <hpa@zytor.com>
Cc: linux-arch <linux-arch@vger.kernel.org>,
mingo@kernel.org, linux-kernel@vger.kernel.org,
tglx@linutronix.de, james.t.kukunas@intel.com,
Linus Torvalds <torvalds@linux-foundation.org>,
David Miller <davem@davemloft.net>
Subject: Re: [tip:x86/asm] x86, bitops: Change bitops to be native operand size
Date: Mon, 11 Nov 2013 15:34:39 -0800 [thread overview]
Message-ID: <5281698F.9080808@linux.intel.com> (raw)
In-Reply-To: <1384136570.4771.5.camel@joe-AO722>
On 11/10/2013 06:22 PM, Joe Perches wrote:
>
> Perhaps the current x86 bitops asm code is being conflated
> with the ideal implementation?
>
Yes, by you.
x86 has instructions that operate on signed bitindicies. It doesn't
have instructions that operate on unsigned bitindicies. Unless someone
is willing to do the work to prove that shift and mask is actually
faster than using the hardware instructions (which I doubt, but it is
always a possibility), that's what we have.
-hpa
next prev parent reply other threads:[~2013-11-11 23:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <tip-z61ofiwe90xeyb461o72h8ya@git.kernel.org>
[not found] ` <1384117768.3081.10.camel@joe-AO722>
[not found] ` <5ac67859-a0b2-47f5-bdc2-c2a52b8d6885@email.android.com>
2013-11-10 22:44 ` [tip:x86/asm] x86, bitops: Change bitops to be native operand size Joe Perches
2013-11-10 22:44 ` Joe Perches
2013-11-11 2:06 ` H. Peter Anvin
2013-11-11 2:22 ` Joe Perches
2013-11-11 23:34 ` H. Peter Anvin [this message]
2013-11-12 2:54 ` Joe Perches
2013-11-12 3:15 ` Linus Torvalds
2013-11-12 4:08 ` Joe Perches
2013-11-12 8:52 ` Geert Uytterhoeven
2013-11-30 23:16 ` Rob Landley
2013-11-30 23:16 ` Rob Landley
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